SDAA519 September   2026 DRA821U-Q1 , TDA4AEN-Q1 , TDA4AH-Q1 , TDA4AL-Q1 , TDA4AP-Q1 , TDA4APE-Q1 , TDA4VE-Q1 , TDA4VEN-Q1 , TDA4VH-Q1 , TDA4VL-Q1 , TDA4VP-Q1 , TDA4VPE-Q1

 

  1.   1
  2.    Abstract
  3.    Trademarks
  4. 1  Introduction
  5. 2  Acronyms and Definitions
  6. 3  USB 2.0 High Speed TX Compliance: Theory of Operation
    1. 3.1 USB 2.0 High Speed Signaling Overview
    2. 3.2 xHCI Port Test Control and Compliance Mode Entry
    3. 3.3 Eye Diagram Compliance
  7. 4  Register Reference
    1. 4.1 xHCI PORTSC — Port Status and Control Register
    2. 4.2 PORTPMSC Bit-Field Description (USB 2.0 — xHCI Spec)
    3. 4.3 Compliance Write Value Decode: 0x40000000
    4. 4.4 USB2 PHY TX Amplitude Register — USB2SS_PHY2_AFE_TX_REG1
  8. 5 Compliance Procedure: TDA4VEN / J722S / TDA4AEN
    1. 5.1 Hardware Requirements
    2. 5.2 Software Requirements
    3. 5.3 Hardware Setup
    4. 5.4 Physical Connections
    5. 5.5 Device Tree Source (DTS) Modification for USB0
    6. 5.6 Step 1: Verify EVM Boot and Console
    7. 5.7 Step 2: Write xHCI Registers to Enable HS Test Packet Mode
    8. 5.8 Step 3: Capture the HS Test Packet Waveform on the Oscilloscope
  9. 6 USB-IF Electrical Analysis Tool: Post-Processing Procedure
  10. 7  Adjusting the HS TX Amplitude
    1. 7.1 TX Amplitude Adjustment Procedure
  11. 8 Compliance Procedure: J7200/J784S4/J721S2/J742S2
  12. 9 Troubleshooting
  13. 10Summary
  14. 11References

Trademarks

Jacinto™ is a trademark of Texas Instruments Incorporated.

Linux™ is a trademark of Linus Torvalds.

USB Type-C™ is a trademark of USB Implementers Forum.

Tektronix® is a registered trademark of Tektronix, Inc.

All trademarks are the property of their respective owners.