SLAS574B September   2013  – November 2025 ADS5474-SP

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Characteristics
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
      1. 6.1.1 Input Configuration
      2. 6.1.2 Clock Inputs
      3. 6.1.3 Digital Outputs
  8. Application and Implementation
    1. 7.1 Power Supply Recommendations
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Definition of Specifications
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Thermal Information

(1)
THERMAL METRICTEST CONDITIONSTYPUNIT
RθJAJunction-to-free-air thermal resistanceJunction-to-case thermal resistance21.81°C/W
RθJCJunction-to-case thermal resistanceMIL-STD-883 Test Method 10120.849
This CQFP package has built-in vias that electrically and thermally connect the bottom of the die to a pad on the bottom of the package. To efficiently remove heat and provide a low-impedance ground path, a thermal land is required on the surface of the PCB directly underneath the body of the package. During normal surface mount flow solder operations, the heat pad on the underside of the package is soldered to this thermal land creating an efficient thermal path. Normally, the PCB thermal land has a number of thermal vias within it that provide a thermal path to internal copper areas (or to the opposite side of the PCB) that provide for more efficient heat removal. TI typically recommends an 11.9mm2 board-mount thermal pad. This allows maximum area for thermal dissipation, while keeping leads away from the pad area to prevent solder bridging. A sufficient quantity of thermal/electrical vias must be included to keep the device within recommended operating conditions. This pad must be electrically at ground potential.