SLAS574B September   2013  – November 2025 ADS5474-SP

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Characteristics
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
      1. 6.1.1 Input Configuration
      2. 6.1.2 Clock Inputs
      3. 6.1.3 Digital Outputs
  8. Application and Implementation
    1. 7.1 Power Supply Recommendations
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Definition of Specifications
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Overview

The ADS5474 is a 14-bit, 400MSPS, monolithic pipeline ADC. The bipolar analog core operates from 5V and 3.3V supplies, while the output uses a 3.3V supply to provide LVDS-compatible outputs. The rising edge of the external input clock initiates the conversion process. At the instant of the conversion process, the differential input signal is captured by the input track-and-hold (T&H), and the input sample converts sequentially by a series of lower resolution stages, with the outputs combined in a digital correction logic block. Both the rising and the falling clock edges propagate the sample through the pipeline every half clock cycle. The process results in a data latency of 3.5 clock cycles, after which the output data is available as a 14-bit parallel word, coded in offset binary format.