SLAS574B September   2013  – November 2025 ADS5474-SP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
      1. 6.1.1 Input Configuration
      2. 6.1.2 Clock Inputs
      3. 6.1.3 Digital Outputs
  8. 7 Application and Implementation
    1. 7.1 Power Supply Recommendations
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Definition of Specifications
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.5 Electrical Characteristics

Typical values at TC = 25°C: minimum and maximum values over full temperature range TC,MIN = –55°C to TC,MAX = 125°C, sampling rate = 400MSPS, 50% clock duty cycle, AVDD5 = 5V, AVDD3 = 3.3V, DVDD3 = 3.3V, –1dBFS differential input, and 3VPP differential clock, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Resolution 14 bits
ANALOG INPUTS
Differential input range 2.2 VPP
Analog input common-mode voltage Self-biased; see VCM specification below 3.1 V
Input resistance (dc) Each input to VCM 500 Ω
Input capacitance Each input to GND 2.8 pF
Analog input bandwidth (–3dB) 1.28 GHz
CMRR Common-mode rejection ratio Common-mode signal < 50MHz
(see Figure 5-28)		 100 dB
INTERNAL REFERENCE VOLTAGE
VREF Reference voltage 2.4 V
VCM Analog input common-mode voltage reference output With internal VREF. Provided as an output via the VCM pin for dc-coupled applications. 2.9 3.1 3.3 V
VCM temperature coefficient –0.8 mV/°C
DYNAMIC ACCURACY
No missing codes Assured
DNL Differential linearity error ƒIN = 10MHz –0.99 ±0.7 2.5 LSB
INL Integral linearity error ƒIN = 10MHz –7.0 ±1.5 7.0 LSB
Offset error –16 16 mV
Offset temperature coefficient 0.02 mV/°C
Gain error –5 5 %FS
Gain temperature coefficient –0.02 %FS/°C
POWER SUPPLY
IAVDD5 5V analog supply current VIN = full-scale, ƒIN = 70MHz,
ƒS = 400MSPS		 338 380 mA
IAVDD3 3.3V analog supply current 185 210 mA
IDVDD3 3.3V digital supply current
(includes LVDS)		 75 85 mA
Total power dissipation 2.5 2.835 W
Power-up time From turn-on of AVDD5 50 μs
Wake-up time From PDWN pin switched from HIGH (PDWN active) to LOW (ADC awake)
(see Figure 5-29)		 5 μs
Power-down power dissipation PDWN pin = logic HIGH 50 350 mW
PSRR Power-supply rejection ratio,
AVDD5 supply		 Without 0.1μF board supply capacitors, with < 1MHz supply noise 75 dB
PSRR Power-supply rejection ratio,
AVDD3 supply		 90 dB
PSRR Power-supply rejection ratio,
DVDD3 supply		 110 dB
DYNAMIC AC CHARACTERISTICS
SNR Signal-to-noise ratio ƒIN = 30MHz 70.5 dBFS
ƒIN = 70MHz 65 68.7
ƒIN = 130MHz 69.9
ƒIN = 230MHz 65 69.8
ƒIN = 351MHz 69.2
ƒIN = 451MHz 68.8
ƒIN = 651MHz 67.3
ƒIN = 751MHz 66.6
ƒIN = 999MHz 64.4
SFDR Spurious-free dynamic range ƒIN = 30MHz 79.4 dBc
ƒIN = 70MHz 69 76.3
ƒIN = 130MHz 78.8
ƒIN = 230MHz 64.5 78
ƒIN = 351MHz 74.3
ƒIN = 451MHz 70.5
ƒIN = 651MHz 58.6
ƒIN = 751MHz 54.3
ƒIN = 999MHz 46
HD2 Second-harmonic ƒIN = 30MHz 92 dBc
ƒIN = 70MHz 87
ƒIN = 130MHz 87
ƒIN = 230MHz 84
ƒIN = 351MHz 77
ƒIN = 451MHz 75
ƒIN = 651MHz 68
ƒIN = 751MHz 64
ƒIN = 999MHz 53
HD3 Third-harmonic ƒIN = 30MHz 81 dBc
ƒIN = 70MHz 86
ƒIN = 130MHz 80
ƒIN = 230MHz 80
ƒIN = 351MHz 76
ƒIN = 451MHz 72
ƒIN = 651MHz 60
ƒIN = 751MHz 56
ƒIN = 999MHz 48
Worst harmonic/spur
(other than HD2 and HD3)		 ƒIN = 30MHz 93 dBc
ƒIN = 70MHz 91
ƒIN = 130MHz 91
ƒIN = 230MHz 88
ƒIN = 351MHz 87
ƒIN = 451MHz 87
ƒIN = 651MHz 91
ƒIN = 751MHz 87
ƒIN = 999MHz 80
THD Total harmonic distortion ƒIN = 30MHz 77 dBc
ƒIN = 70MHz 73.5
ƒIN = 130MHz 74.9
ƒIN = 230MHz 74.9
ƒIN = 351MHz 71.3
ƒIN = 451MHz 68.4
ƒIN = 651MHz 57.8
ƒIN = 751MHz 53.6
ƒIN = 999MHz 45
SINAD Signal-to-noise and distortion ƒIN = 30MHz 69.8 dBc
ƒIN = 70MHz 62.5 67.7
ƒIN = 130MHz 68.9
ƒIN = 230MHz 60.5 68.9
ƒIN = 351MHz 67.5
ƒIN = 451MHz 66.1
ƒIN = 651MHz 58.2
ƒIN = 751MHz 54.3
ƒIN = 999MHz 45.9
Two-tone SFDR ƒIN1 = 69MHz, ƒIN2 = 70MHz,
each tone at –7dBFS		 84.2 dBFS
ƒIN1 = 69MHz, ƒIN2 = 70MHz,
each tone at –16dBFS		 98.5
ƒIN1 = 297.5MHz, ƒIN2 = 302.5MHz,
each tone at –7dBFS		 82.5
ƒIN1 = 297.5MHz, ƒIN2 = 302.5MHz,
each tone at –16dBFS		 99
ENOB Effective number of bits ƒIN = 70MHz 10.1 10.9 bits
ƒIN = 230MHz 9.77 10.5
RMS idle-channel noise Inputs tied to common-mode 1.8 LSB
LVDS DIGITAL OUTPUTS
VOD Differential output voltage (±) 247 350 454 mV
VOC Common-mode output voltage 1.115 1.375 V
DIGITAL INPUTS
VIH High level input voltage PWD (pin 33) 2.0 V
VIL Low level input voltage 0.8 V
IIH High level input current 1 μA
IIL Low level input current -1 μA
CIN Input capacitance 2.2 pF
ADS5474-SP Operating Life Derating Chart, Electromigration Fail Mode Figure 5-1 Operating Life Derating Chart, Electromigration Fail Mode