SLASF33A January   2024  – March 2025 TAC5412-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Timing Requirements: I2C Interface
    7. 5.7  Switching Characteristics: I2C Interface
    8. 5.8  Timing Requirements: SPI
    9. 5.9  Switching Characteristics: SPI
    10. 5.10 Timing Requirements: TDM, I2S or LJ Interface
    11. 5.11 Switching Characteristics: TDM, I2S or LJ Interface
    12. 5.12 Timing Requirements: PDM Digital Microphone Interface
    13. 5.13 Switching Characteristics: PDM Digial Microphone Interface
    14. 5.14 Timing Diagrams
    15. 5.15 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Serial Interfaces
        1. 6.3.1.1 Control Serial Interfaces
        2. 6.3.1.2 Audio Serial Interfaces
          1. 6.3.1.2.1 Time Division Multiplexed Audio (TDM) Interface
          2. 6.3.1.2.2 Inter IC Sound (I2S) Interface
          3. 6.3.1.2.3 Left-Justified (LJ) Interface
        3. 6.3.1.3 Using Multiple Devices With Shared Buses
      2. 6.3.2  Phase-Locked Loop (PLL) and Clock Generation
      3. 6.3.3  Input Channel Configuration
      4. 6.3.4  Reference Voltage
      5. 6.3.5  Microphone Bias
      6. 6.3.6  Digital PDM Microphone Record Channel
      7. 6.3.7  Signal-Chain Processing
        1. 6.3.7.1 ADC Signal-Chain
          1. 6.3.7.1.1  6 to 4 Input Select Multiplexer (6:4 MUX)
          2. 6.3.7.1.2  Programmable Channel Gain and Digital Volume Control
          3. 6.3.7.1.3  Programmable Channel Gain Calibration
          4. 6.3.7.1.4  Programmable Channel Phase Calibration
          5. 6.3.7.1.5  Programmable Digital High-Pass Filter
          6. 6.3.7.1.6  Programmable Digital Biquad Filters
          7. 6.3.7.1.7  Programmable Channel Summer and Digital Mixer
          8. 6.3.7.1.8  Configurable Digital Decimation Filters
            1. 6.3.7.1.8.1 Linear-phase filters
              1. 6.3.7.1.8.1.1 Sampling Rate: 8kHz or 7.35kHz
              2. 6.3.7.1.8.1.2 Sampling Rate: 16kHz or 14.7kHz
              3. 6.3.7.1.8.1.3 Sampling Rate: 24kHz or 22.05kHz
              4. 6.3.7.1.8.1.4 Sampling Rate: 32kHz or 29.4kHz
              5. 6.3.7.1.8.1.5 Sampling Rate: 48kHz or 44.1kHz
              6. 6.3.7.1.8.1.6 Sampling Rate: 96kHz or 88.2kHz
              7. 6.3.7.1.8.1.7 Sampling Rate: 192kHz or 176.4kHz
              8. 6.3.7.1.8.1.8 Sampling Rate: 384kHz or 352.8kHz
              9. 6.3.7.1.8.1.9 Sampling Rate: 768kHz or 705.6kHz
            2. 6.3.7.1.8.2 Low-latency Filters
              1. 6.3.7.1.8.2.1 Sampling Rate: 24kHz or 22.05kHz
              2. 6.3.7.1.8.2.2 Sampling Rate: 32kHz or 29.4kHz
              3. 6.3.7.1.8.2.3 Sampling Rate: 48kHz or 44.1kHz
              4. 6.3.7.1.8.2.4 Sampling Rate: 96kHz or 88.2kHz
              5. 6.3.7.1.8.2.5 Sampling Rate: 192kHz or 176.4kHz
            3. 6.3.7.1.8.3 Ultra-Low-Latency Filters
              1. 6.3.7.1.8.3.1 Sampling Rate: 24kHz or 22.05kHz
              2. 6.3.7.1.8.3.2 Sampling Rate: 32kHz or 29.4kHz
              3. 6.3.7.1.8.3.3 Sampling Rate: 48kHz or 44.1kHz
              4. 6.3.7.1.8.3.4 Sampling Rate: 96kHz or 88.2kHz
              5. 6.3.7.1.8.3.5 Sampling Rate: 192kHz or 176.4kHz
          9. 6.3.7.1.9  Automatic Gain Controller (AGC)
          10. 6.3.7.1.10 Voice Activity Detection (VAD)
          11. 6.3.7.1.11 Ultrasonic Activity Detection (UAD)
        2. 6.3.7.2 DAC Signal-Chain
          1. 6.3.7.2.1 Programmable Channel Gain and Digital Volume Control
          2. 6.3.7.2.2 Programmable Channel Gain Calibration
          3. 6.3.7.2.3 Programmable Digital High-Pass Filter
          4. 6.3.7.2.4 Programmable Digital Biquad Filters
          5. 6.3.7.2.5 Configurable Digital Interpolation Filters
            1. 6.3.7.2.5.1 Linear-phase filters
              1. 6.3.7.2.5.1.1 Sampling Rate: 8kHz or 7.35kHz
              2. 6.3.7.2.5.1.2 Sampling Rate: 16kHz or 14.7kHz
              3. 6.3.7.2.5.1.3 Sampling Rate: 24kHz or 22.05kHz
              4. 6.3.7.2.5.1.4 Sampling Rate: 32kHz or 29.4kHz
              5. 6.3.7.2.5.1.5 Sampling Rate: 48kHz or 44.1kHz
              6. 6.3.7.2.5.1.6 Sampling Rate: 96kHz or 88.2kHz
              7. 6.3.7.2.5.1.7 Sampling Rate: 192kHz or 176.4kHz
              8. 6.3.7.2.5.1.8 Sampling Rate: 384kHz or 352.8kHz
              9. 6.3.7.2.5.1.9 Sampling Rate 768kHz or 705.6kHz
            2. 6.3.7.2.5.2 Low-latency Filters
              1. 6.3.7.2.5.2.1 Sampling Rate: 24kHz or 22.05kHz
              2. 6.3.7.2.5.2.2 Sampling Rate: 32kHz or 29.4kHz
              3. 6.3.7.2.5.2.3 Sampling Rate: 48kHz or 44.1kHz
              4. 6.3.7.2.5.2.4 Sampling Rate: 96kHz or 88.2kHz
              5. 6.3.7.2.5.2.5 Sampling Rate: 192kHz or 176.4kHz
            3. 6.3.7.2.5.3 Ultra-Low-Latency Filters
              1. 6.3.7.2.5.3.1 Sampling Rate: 24kHz or 22.05kHz
              2. 6.3.7.2.5.3.2 Sampling Rate: 32kHz or 29.4kHz
              3. 6.3.7.2.5.3.3 Sampling Rate: 48kHz or 44.1kHz
              4. 6.3.7.2.5.3.4 Sampling Rate: 96kHz or 88.2kHz
              5. 6.3.7.2.5.3.5 Sampling Rate 192kHz or 176.4kHz
          6. 6.3.7.2.6 Programmable Digital Mixer
      8. 6.3.8  Interrupts, Status, and Digital I/O Pin Multiplexing
      9. 6.3.9  Input DC Fault Diagnostics
      10. 6.3.10 Power Tune Mode
    4. 6.4 Device Functional Modes
      1. 6.4.1 Sleep Mode or Software Shutdown
      2. 6.4.2 Active Mode
      3. 6.4.3 Software Reset
    5. 6.5 Programming
      1. 6.5.1 Control Serial Interfaces
        1. 6.5.1.1 I2C Control Interface
          1. 6.5.1.1.1 General I2C Operation
          2. 6.5.1.1.2 I2C Single-Byte and Multiple-Byte Transfers
            1. 6.5.1.1.2.1 I2C Single-Byte Write
            2. 6.5.1.1.2.2 I2C Multiple-Byte Write
            3. 6.5.1.1.2.3 I2C Single-Byte Read
            4. 6.5.1.1.2.4 I2C Multiple-Byte Read
        2. 6.5.1.2 SPI Control Interface
  8. 7 Register Maps
    1. 7.1 Device Configuration Registers
      1. 7.1.1 TAC5412-Q1_B0_P0 Registers
      2. 7.1.2 TAC5412-Q1_B0_P1 Registers
      3. 7.1.3 TAC5412-Q1_B0_P3 Registers
    2. 7.2 Programmable Coefficient Registers
      1. 7.2.1  Programmable Coefficient Registers: Page 8
      2. 7.2.2  Programmable Coefficient Registers: Page 9
      3. 7.2.3  Programmable Coefficient Registers: Page 10
      4. 7.2.4  Programmable Coefficient Registers: Page 11
      5. 7.2.5  Programmable Coefficient Registers: Page 15
      6. 7.2.6  Programmable Coefficient Registers: Page 16
      7. 7.2.7  Programmable Coefficient Registers: Page 17
      8. 7.2.8  Programmable Coefficient Registers: Page 18
      9. 7.2.9  Programmable Coefficient Registers: Page 19
      10. 7.2.10 Programmable Coefficient Registers: Page 25
      11. 7.2.11 Programmable Coefficient Registers: Page 26
      12. 7.2.12 Programmable Coefficient Registers: Page 27
      13. 7.2.13 Programmable Coefficient Registers: Page 28
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Application
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
      4. 8.2.4 Typical Characteristics
      5. 8.2.5 Example Device Register Configuration Script for EVM Setup
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 IOVDD_IO_MODE for 1.8V and 1.2V Operation
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.2.1 Programmable Coefficient Registers: Page 8

This register page shown in Table 7-228 consists of the programmable coefficients for the ADC biquad 1 to biquad 6 filters.

Table 7-216 Page 8 Programmable Coefficient Registers
ADDRESS REGISTER RESET DESCRIPTION
0x00 PAGE[7:0] 0x00 Device Page Register
0x08 ADC_BQ1_N0_BYT1[7:0] 0x7F Programmable ADC biquad 1, N0 coefficient byte[31:24]
0x09 ADC_BQ1_N0_BYT2[7:0] 0xFF Programmable ADC biquad 1, N0 coefficient byte[23:16]
0x0A ADC_BQ1_N0_BYT3[7:0] 0xFF Programmable ADC biquad 1, N0 coefficient byte[15:8]
0x0B ADC_BQ1_N0_BYT4[7:0] 0xFF Programmable ADC biquad 1, N0 coefficient byte[7:0]
0x0C ADC_BQ1_N1_BYT1[7:0] 0x00 Programmable ADC biquad 1, N1 coefficient byte[31:24]
0x0D ADC_BQ1_N1_BYT2[7:0] 0x00 Programmable ADC biquad 1, N1 coefficient byte[23:16]
0x0E ADC_BQ1_N1_BYT3[7:0] 0x00 Programmable ADC biquad 1, N1 coefficient byte[15:8]
0x0F ADC_BQ1_N1_BYT4[7:0] 0x00 Programmable ADC biquad 1, N1 coefficient byte[7:0]
0x10 ADC_BQ1_N2_BYT1[7:0] 0x00 Programmable ADC biquad 1, N2 coefficient byte[31:24]
0x11 ADC_BQ1_N2_BYT2[7:0] 0x00 Programmable ADC biquad 1, N2 coefficient byte[23:16]
0x12 ADC_BQ1_N2_BYT3[7:0] 0x00 Programmable ADC biquad 1, N2 coefficient byte[15:8]
0x13 ADC_BQ1_N2_BYT4[7:0] 0x00 Programmable ADC biquad 1, N2 coefficient byte[7:0]
0x14 ADC_BQ1_D1_BYT1[7:0] 0x00 Programmable ADC biquad 1, D1 coefficient byte[31:24]
0x15 ADC_BQ1_D1_BYT2[7:0] 0x00 Programmable ADC biquad 1, D1 coefficient byte[23:16]
0x16 ADC_BQ1_D1_BYT3[7:0] 0x00 Programmable ADC biquad 1, D1 coefficient byte[15:8]
0x17 ADC_BQ1_D1_BYT4[7:0] 0x00 Programmable ADC biquad 1, D1 coefficient byte[7:0]
0x18 ADC_BQ1_D2_BYT1[7:0] 0x00 Programmable ADC biquad 1, D2 coefficient byte[31:24]
0x19 ADC_BQ1_D2_BYT2[7:0] 0x00 Programmable ADC biquad 1, D2 coefficient byte[23:16]
0x1A ADC_BQ1_D2_BYT3[7:0] 0x00 Programmable ADC biquad 1, D2 coefficient byte[15:8]
0x1B ADC_BQ1_D2_BYT4[7:0] 0x00 Programmable ADC biquad 1, D2 coefficient byte[7:0]
0x1C ADC_BQ2_N0_BYT1[7:0] 0x7F Programmable ADC biquad 2, N0 coefficient byte[31:24]
0x1D ADC_BQ2_N0_BYT2[7:0] 0xFF Programmable ADC biquad 2, N0 coefficient byte[23:16]
0x1E ADC_BQ2_N0_BYT3[7:0] 0xFF Programmable ADC biquad 2, N0 coefficient byte[15:8]
0x1F ADC_BQ2_N0_BYT4[7:0] 0xFF Programmable ADC biquad 2, N0 coefficient byte[7:0]
0x20 ADC_BQ2_N1_BYT1[7:0] 0x00 Programmable ADC biquad 2, N1 coefficient byte[31:24]
0x21 ADC_BQ2_N1_BYT2[7:0] 0x00 Programmable ADC biquad 2, N1 coefficient byte[23:16]
0x22 ADC_BQ2_N1_BYT3[7:0] 0x00 Programmable ADC biquad 2, N1 coefficient byte[15:8]
0x23 ADC_BQ2_N1_BYT4[7:0] 0x00 Programmable ADC biquad 2, N1 coefficient byte[7:0]
0x24 ADC_BQ2_N2_BYT1[7:0] 0x00 Programmable ADC biquad 2, N2 coefficient byte[31:24]
0x25 ADC_BQ2_N2_BYT2[7:0] 0x00 Programmable ADC biquad 2, N2 coefficient byte[23:16]
0x26 ADC_BQ2_N2_BYT3[7:0] 0x00 Programmable ADC biquad 2, N2 coefficient byte[15:8]
0x27 ADC_BQ2_N2_BYT4[7:0] 0x00 Programmable ADC biquad 2, N2 coefficient byte[7:0]
0x28 ADC_BQ2_D1_BYT1[7:0] 0x00 Programmable ADC biquad 2, D1 coefficient byte[31:24]
0x29 ADC_BQ2_D1_BYT2[7:0] 0x00 Programmable ADC biquad 2, D1 coefficient byte[23:16]
0x2A ADC_BQ2_D1_BYT3[7:0] 0x00 Programmable ADC biquad 2, D1 coefficient byte[15:8]
0x2B ADC_BQ2_D1_BYT4[7:0] 0x00 Programmable ADC biquad 2, D1 coefficient byte[7:0]
0x2C ADC_BQ2_D2_BYT1[7:0] 0x00 Programmable ADC biquad 2, D2 coefficient byte[31:24]
0x2D ADC_BQ2_D2_BYT2[7:0] 0x00 Programmable ADC biquad 2, D2 coefficient byte[23:16]
0x2E ADC_BQ2_D2_BYT3[7:0] 0x00 Programmable ADC biquad 2, D2 coefficient byte[15:8]
0x2F ADC_BQ2_D2_BYT4[7:0] 0x00 Programmable ADC biquad 2, D2 coefficient byte[7:0]
0x30 ADC_BQ3_N0_BYT1[7:0] 0x7F Programmable ADC biquad 3, N0 coefficient byte[31:24]
0x31 ADC_BQ3_N0_BYT2[7:0] 0xFF Programmable ADC biquad 3, N0 coefficient byte[23:16]
0x32 ADC_BQ3_N0_BYT3[7:0] 0xFF Programmable ADC biquad 3, N0 coefficient byte[15:8]
0x33 ADC_BQ3_N0_BYT4[7:0] 0xFF Programmable ADC biquad 3, N0 coefficient byte[7:0]
0x34 ADC_BQ3_N1_BYT1[7:0] 0x00 Programmable ADC biquad 3, N1 coefficient byte[31:24]
0x35 ADC_BQ3_N1_BYT2[7:0] 0x00 Programmable ADC biquad 3, N1 coefficient byte[23:16]
0x36 ADC_BQ3_N1_BYT3[7:0] 0x00 Programmable ADC biquad 3, N1 coefficient byte[15:8]
0x37 ADC_BQ3_N1_BYT4[7:0] 0x00 Programmable ADC biquad 3, N1 coefficient byte[7:0]
0x38 ADC_BQ3_N2_BYT1[7:0] 0x00 Programmable ADC biquad 3, N2 coefficient byte[31:24]
0x39 ADC_BQ3_N2_BYT2[7:0] 0x00 Programmable ADC biquad 3, N2 coefficient byte[23:16]
0x3A ADC_BQ3_N2_BYT3[7:0] 0x00 Programmable ADC biquad 3, N2 coefficient byte[15:8]
0x3B ADC_BQ3_N2_BYT4[7:0] 0x00 Programmable ADC biquad 3, N2 coefficient byte[7:0]
0x3C ADC_BQ3_D1_BYT1[7:0] 0x00 Programmable ADC biquad 3, D1 coefficient byte[31:24]
0x3D ADC_BQ3_D1_BYT2[7:0] 0x00 Programmable ADC biquad 3, D1 coefficient byte[23:16]
0x3E ADC_BQ3_D1_BYT3[7:0] 0x00 Programmable ADC biquad 3, D1 coefficient byte[15:8]
0x3F ADC_BQ3_D1_BYT4[7:0] 0x00 Programmable ADC biquad 3, D1 coefficient byte[7:0]
0x40 ADC_BQ3_D2_BYT1[7:0] 0x00 Programmable ADC biquad 3, D2 coefficient byte[31:24]
0x41 ADC_BQ3_D2_BYT2[7:0] 0x00 Programmable ADC biquad 3, D2 coefficient byte[23:16]
0x42 ADC_BQ3_D2_BYT3[7:0] 0x00 Programmable ADC biquad 3, D2 coefficient byte[15:8]
0x43 ADC_BQ3_D2_BYT4[7:0] 0x00 Programmable ADC biquad 3, D2 coefficient byte[7:0]
0x44 ADC_BQ4_N0_BYT1[7:0] 0x7F Programmable ADC biquad 4, N0 coefficient byte[31:24]
0x45 ADC_BQ4_N0_BYT2[7:0] 0xFF Programmable ADC biquad 4, N0 coefficient byte[23:16]
0x46 ADC_BQ4_N0_BYT3[7:0] 0xFF Programmable ADC biquad 4, N0 coefficient byte[15:8]
0x47 ADC_BQ4_N0_BYT4[7:0] 0xFF Programmable ADC biquad 4, N0 coefficient byte[7:0]
0x48 ADC_BQ4_N1_BYT1[7:0] 0x00 Programmable ADC biquad 4, N1 coefficient byte[31:24]
0x49 ADC_BQ4_N1_BYT2[7:0] 0x00 Programmable ADC biquad 4, N1 coefficient byte[23:16]
0x4A ADC_BQ4_N1_BYT3[7:0] 0x00 Programmable ADC biquad 4, N1 coefficient byte[15:8]
0x4B ADC_BQ4_N1_BYT4[7:0] 0x00 Programmable ADC biquad 4, N1 coefficient byte[7:0]
0x4C ADC_BQ4_N2_BYT1[7:0] 0x00 Programmable ADC biquad 4, N2 coefficient byte[31:24]
0x4D ADC_BQ4_N2_BYT2[7:0] 0x00 Programmable ADC biquad 4, N2 coefficient byte[23:16]
0x4E ADC_BQ4_N2_BYT3[7:0] 0x00 Programmable ADC biquad 4, N2 coefficient byte[15:8]
0x4F ADC_BQ4_N2_BYT4[7:0] 0x00 Programmable ADC biquad 4, N2 coefficient byte[7:0]
0x50 ADC_BQ4_D1_BYT1[7:0] 0x00 Programmable ADC biquad 4, D1 coefficient byte[31:24]
0x51 ADC_BQ4_D1_BYT2[7:0] 0x00 Programmable ADC biquad 4, D1 coefficient byte[23:16]
0x52 ADC_BQ4_D1_BYT3[7:0] 0x00 Programmable ADC biquad 4, D1 coefficient byte[15:8]
0x53 ADC_BQ4_D1_BYT4[7:0] 0x00 Programmable ADC biquad 4, D1 coefficient byte[7:0]
0x54 ADC_BQ4_D2_BYT1[7:0] 0x00 Programmable ADC biquad 4, D2 coefficient byte[31:24]
0x55 ADC_BQ4_D2_BYT2[7:0] 0x00 Programmable ADC biquad 4, D2 coefficient byte[23:16]
0x56 ADC_BQ4_D2_BYT3[7:0] 0x00 Programmable ADC biquad 4, D2 coefficient byte[15:8]
0x57 ADC_BQ4_D2_BYT4[7:0] 0x00 Programmable ADC biquad 4, D2 coefficient byte[7:0]
0x58 ADC_BQ5_N0_BYT1[7:0] 0x7F Programmable ADC biquad 5, N0 coefficient byte[31:24]
0x59 ADC_BQ5_N0_BYT2[7:0] 0xFF Programmable ADC biquad 5, N0 coefficient byte[23:16]
0x5A ADC_BQ5_N0_BYT3[7:0] 0xFF Programmable ADC biquad 5, N0 coefficient byte[15:8]
0x5B ADC_BQ5_N0_BYT4[7:0] 0xFF Programmable ADC biquad 5, N0 coefficient byte[7:0]
0x5C ADC_BQ5_N1_BYT1[7:0] 0x00 Programmable ADC biquad 5, N1 coefficient byte[31:24]
0x5D ADC_BQ5_N1_BYT2[7:0] 0x00 Programmable ADC biquad 5, N1 coefficient byte[23:16]
0x5E ADC_BQ5_N1_BYT3[7:0] 0x00 Programmable ADC biquad 5, N1 coefficient byte[15:8]
0x5F ADC_BQ5_N1_BYT4[7:0] 0x00 Programmable ADC biquad 5, N1 coefficient byte[7:0]
0x60 ADC_BQ5_N2_BYT1[7:0] 0x00 Programmable ADC biquad 5, N2 coefficient byte[31:24]
0x61 ADC_BQ5_N2_BYT2[7:0] 0x00 Programmable ADC biquad 5, N2 coefficient byte[23:16]
0x62 ADC_BQ5_N2_BYT3[7:0] 0x00 Programmable ADC biquad 5, N2 coefficient byte[15:8]
0x63 ADC_BQ5_N2_BYT4[7:0] 0x00 Programmable ADC biquad 5, N2 coefficient byte[7:0]
0x64 ADC_BQ5_D1_BYT1[7:0] 0x00 Programmable ADC biquad 5, D1 coefficient byte[31:24]
0x65 ADC_BQ5_D1_BYT2[7:0] 0x00 Programmable ADC biquad 5, D1 coefficient byte[23:16]
0x66 ADC_BQ5_D1_BYT3[7:0] 0x00 Programmable ADC biquad 5, D1 coefficient byte[15:8]
0x67 ADC_BQ5_D1_BYT4[7:0] 0x00 Programmable ADC biquad 5, D1 coefficient byte[7:0]
0x68 ADC_BQ5_D2_BYT1[7:0] 0x00 Programmable ADC biquad 5, D2 coefficient byte[31:24]
0x69 ADC_BQ5_D2_BYT2[7:0] 0x00 Programmable ADC biquad 5, D2 coefficient byte[23:16]
0x6A ADC_BQ5_D2_BYT3[7:0] 0x00 Programmable ADC biquad 5, D2 coefficient byte[15:8]
0x6B ADC_BQ5_D2_BYT4[7:0] 0x00 Programmable ADC biquad 5, D2 coefficient byte[7:0]
0x6C ADC_BQ6_N0_BYT1[7:0] 0x7F Programmable ADC biquad 6, N0 coefficient byte[31:24]
0x6D ADC_BQ6_N0_BYT2[7:0] 0xFF Programmable ADC biquad 6, N0 coefficient byte[23:16]
0x6E ADC_BQ6_N0_BYT3[7:0] 0xFF Programmable ADC biquad 6, N0 coefficient byte[15:8]
0x6F ADC_BQ6_N0_BYT4[7:0] 0xFF Programmable ADC biquad 6, N0 coefficient byte[7:0]
0x70 ADC_BQ6_N1_BYT1[7:0] 0x00 Programmable ADC biquad 6, N1 coefficient byte[31:24]
0x71 ADC_BQ6_N1_BYT2[7:0] 0x00 Programmable ADC biquad 6, N1 coefficient byte[23:16]
0x72 ADC_BQ6_N1_BYT3[7:0] 0x00 Programmable ADC biquad 6, N1 coefficient byte[15:8]
0x73 ADC_BQ6_N1_BYT4[7:0] 0x00 Programmable ADC biquad 6, N1 coefficient byte[7:0]
0x74 ADC_BQ6_N2_BYT1[7:0] 0x00 Programmable ADC biquad 6, N2 coefficient byte[31:24]
0x75 ADC_BQ6_N2_BYT2[7:0] 0x00 Programmable ADC biquad 6, N2 coefficient byte[23:16]
0x76 ADC_BQ6_N2_BYT3[7:0] 0x00 Programmable ADC biquad 6, N2 coefficient byte[15:8]
0x77 ADC_BQ6_N2_BYT4[7:0] 0x00 Programmable ADC biquad 6, N2 coefficient byte[7:0]
0x78 ADC_BQ6_D1_BYT1[7:0] 0x00 Programmable ADC biquad 6, D1 coefficient byte[31:24]
0x79 ADC_BQ6_D1_BYT2[7:0] 0x00 Programmable ADC biquad 6, D1 coefficient byte[23:16]
0x7A ADC_BQ6_D1_BYT3[7:0] 0x00 Programmable ADC biquad 6, D1 coefficient byte[15:8]
0x7B ADC_BQ6_D1_BYT4[7:0] 0x00 Programmable ADC biquad 6, D1 coefficient byte[7:0]
0x7C ADC_BQ6_D2_BYT1[7:0] 0x00 Programmable ADC biquad 6, D2 coefficient byte[31:24]
0x7D ADC_BQ6_D2_BYT2[7:0] 0x00 Programmable ADC biquad 6, D2 coefficient byte[23:16]
0x7E ADC_BQ6_D2_BYT3[7:0] 0x00 Programmable ADC biquad 6, D2 coefficient byte[15:8]
0x7F ADC_BQ6_D2_BYT4[7:0] 0x00 Programmable ADC biquad 6, D2 coefficient byte[7:0]