SLAU320AJ July 2010 – May 2021
Reference function: ExecutePOR_430Xv2
On devices with Low Energy Accelerator (LEA), executing a POR using the described functions resets the LEA module.
IR_SHIFT("IR_CNTRL_SIG_CAPTURE") : returns JTAG ID |
ClrTCLK : provide one clock cycle to empty the pipe |
SetTCLK |
IR_SHIFT("IR_CNTRL_SIG_16BIT") : prepare access to the JTAG CNTRL SIG register |
DR_Shift16(0x0C01) : release CPUSUSP signal and apply POR signal |
DR_Shift16(0x0401) : release POR signal again |
ClrTCLK |
SetTCLK |
ClrTCLK |
SetTCLK |
ClrTCLK |
SetTCLK |
ClrTCLK : two more clock cycles to release CPU internal POR delay signals |
SetTCLK |
ClrTCLK |
SetTCLK |
IR_SHIFT("IR_CNTRL_SIG_16BIT") : set CPUSUSP signal again |
DR_Shift16(0x0501) |
ClrTCLK : ...and provide one more clock cycle |
SetTCLK |
The CPU is now in Full-Emulation-State' |
Disable Watchdog Timer on target device now by setting the HOLD signal in the WDT_CNTRL register (that is, by using WriteMem_430Xv2 |
'Full-Emulation-State' can be checked by the running the commands below |
IR_Shift("IR_CNTRL_SIG_CAPTURE") |
DR_Shift16(0) : return value & 0x0301 should be true |
ClrTCLK : provide one clock cycle to empty the pipe |
SetTCLK |
IR_SHIFT("IR_CNTRL_SIG_16BIT") : prepare access to the JTAG CNTRL SIG register |
DR_Shift16(0x0C01) : release CPUSUSP signal and apply POR signal |
DR_Shift16(0x0401) : release POR signal again |
IR_Shift(IR_DATA_16BIT) : set PC to safe memory location |
ClrTCLK |
SetTCLK |
ClrTCLK |
SetTCLK |
DR_Shift16(SAFE_FRAM_PC) : PC is set to 0x4 - MAB value can be 0x6 or 0x8 |
ClrTCLK : Drive safe address into PC |
SetTCLK |
IR_SHIFT("IR_DATA_CAPTURE") |
ClrTCLK : two more clock cycles to release CPU internal POR delay signals |
SetTCLK |
ClrTCLK |
SetTCLK |
IR_SHIFT("IR_CNTRL_SIG_16BIT") : set CPUSUSP signal again |
DR_Shift16(0x0501) |
ClrTCLK : ...and provide one more clock cycle |
SetTCLK |
The CPU is now in Full-Emulation-State' |
Disable Watchdog Timer on target device now by setting the HOLD signal in the WDT_CNTRL register (i.e. by using WriteMem_430Xv2 – note different WDT addresses for individual FRAM device groups) |
Initialize Test Memory with default values to ensure consistency between PC value and MAB (MAB is +2 after sync) – Use WriteMem_430Xv2 to write 0x3FFF to addresses 0x06 and 0x08 (this is only applicable for devices with JTAG ID 0x91 or 0x99) |
'Full-Emulation-State' can be checked by the running the commands below |
IR_Shift("IR_CNTRL_SIG_CAPTURE") |
DR_Shift16(0) : return value & 0x0301 should be true |