SLAZ741D March 2023 – August 2025 MSPM0L1105 , MSPM0L1106 , MSPM0L1303 , MSPM0L1304 , MSPM0L1305 , MSPM0L1306 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346
ADC Module
Functional
ADC Output code jumps degrading DNL/INL specification
The ADC may have errors at a rate as high as 1 in 2M conversions in 12-bit mode.
When a conversion error occurs, it will be a +/- 64LSB random jump in the digital output of the ADC without a corresponding change in the ADC input voltage.
Depending on the application needs the best workaround may vary, but the following workarounds in software are proposed. Selection of the best workaround is left to the judgment of the system designer.
Workaround 1: Upon ADC result outside of application threshold (via ADC Window Comparator or software thresholding), trigger or wait for another ADC result before making critical system decisions
Workaround 2: During post-processing, discard ADC values which are sufficiently far from the median or expected value. The expected value should be based on the average of real samples taken in the system, and the threshold for rejection should be based on the magnitude of the measured system noise.
Workaround 3: Use ADC sample averaging to minimize the effect of the results of any single incorrect conversion.