SLAZ741D March 2023 – August 2025 MSPM0L1105 , MSPM0L1106 , MSPM0L1303 , MSPM0L1304 , MSPM0L1305 , MSPM0L1306 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346
TIMG Module
Functional
Writing 0 to CLKEN bit does not disable counter
Writing 0 to the Counter Clock Control Register(CCLKCTL) Clock Enable bit(CLKEN) does not stop the timer.
Stop the timer by writing 0 to the Counter Control(CTRCTL) Enable(EN) bit.