SLAZ741D March   2023  – August 2025 MSPM0L1105 , MSPM0L1106 , MSPM0L1303 , MSPM0L1304 , MSPM0L1305 , MSPM0L1306 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346

 

  1.   1
  2.   Abstract
  3. 1Functional Advisories
  4. 2Preprogrammed Software Advisories
  5. 3Debug Only Advisories
  6. 4Fixed by Compiler Advisories
  7. 5Device Nomenclature
    1. 5.1 Device Symbolization and Revision Identification
  8. 6Advisory Descriptions
    1. 6.1  ADC_ERR_01
    2. 6.2  ADC_ERR_02
    3. 6.3  ADC_ERR_03
    4. 6.4  ADC_ERR_04
    5. 6.5  ADC_ERR_05
    6. 6.6  ADC_ERR_06
    7. 6.7  COMP_ERR_01
    8. 6.8  COMP_ERR_02
    9. 6.9  COMP_ERR_03
    10. 6.10 COMP_ERR_05
    11. 6.11 CPU_ERR_01
    12. 6.12 CPU_ERR_02
    13. 6.13 CPU_ERR_03
    14. 6.14 FLASH_ERR_02
    15. 6.15 FLASH_ERR_04
    16. 6.16 FLASH_ERR_05
    17. 6.17 FLASH_ERR_06
    18. 6.18 GPIO_ERR_01
    19. 6.19 GPIO_ERR_02
    20. 6.20 GPIO_ERR_03
    21. 6.21 I2C_ERR_01
    22. 6.22 I2C_ERR_02
    23. 6.23 I2C_ERR_03
    24. 6.24 I2C_ERR_04
    25. 6.25 I2C_ERR_05
    26. 6.26 I2C_ERR_06
    27. 6.27 I2C_ERR_07
    28. 6.28 I2C_ERR_08
    29. 6.29 I2C_ERR_09
    30. 6.30 I2C_ERR_10
    31. 6.31 PMCU_ERR_01
    32. 6.32 PMCU_ERR_02
    33. 6.33 PMCU_ERR_03
    34. 6.34 PMCU_ERR_13
    35. 6.35 PWREN_ERR_01
    36. 6.36 RST_ERR_01
    37. 6.37 SPI_ERR_01
    38. 6.38 SPI_ERR_03
    39. 6.39 SPI_ERR_04
    40. 6.40 SPI_ERR_05
    41. 6.41 SPI_ERR_06
    42. 6.42 SPI_ERR_07
    43. 6.43 SYSOSC_ERR_01
    44. 6.44 SYSOSC_ERR_02
    45. 6.45 TIMER_ERR_01
    46. 6.46 TIMER_ERR_04
    47. 6.47 TIMER_ERR_06
    48. 6.48 UART_ERR_01
    49. 6.49 UART_ERR_02
    50. 6.50 UART_ERR_04
    51. 6.51 UART_ERR_05
    52. 6.52 UART_ERR_06
    53. 6.53 UART_ERR_07
    54. 6.54 UART_ERR_08
    55. 6.55 UART_ERR_09
    56. 6.56 VREF_ERR_01
  9. 7Revision History

6.24 I2C_ERR_04

I2C Module

Category

Functional

Function

When SCL is low and SDA is high the Target i2c is not able to release the stretch.

Description

1: SCL line grounded and released, device indefinitely pulls SCL low.

2: Post clock stretch, timeout, and release; if there is another clock low on the line, device indefinitely pulls SCL low.

Workaround

If the I2C target application does not require data reception in low power mode using Async fast clock request, disabling SWUEN by default is recommended, including during reset or power cycle. In this case, bug description 1 and 2 does not occur.

If the I2C target application requires data reception in low power mode using Async fast clock request, enable SWUEN just before entering low power and clear SWUEN after low power exit. Even in this scenario, bug description 1 and 2 can occur when the I2C target is in low power, it will indefinitely stretch the SCL line if there is a continuous clock stretching or timeout caused by another device on the bus. To recover from this situation, enable the low timeout interrupt on the I2C target device, reset and re-initialize the I2C module within the low timeout ISR.