SLAZ763 July   2025 MSPM0H3216

 

  1.   1
  2.   Abstract
  3. 1Functional Advisories
  4. 2Preprogrammed Software Advisories
  5. 3Debug Only Advisories
  6. 4Fixed by Compiler Advisories
  7. 5Device Nomenclature
    1. 5.1 Device Symbolization and Revision Identification
  8. 6Advisory Descriptions
    1. 6.1  ADC_ERR_05
    2. 6.2  CPU_ERR_02
    3. 6.3  CPU_ERR_03
    4. 6.4  FLASH_ERR_02
    5. 6.5  FLASH_ERR_03
    6. 6.6  I2C_ERR_04
    7. 6.7  I2C_ERR_05
    8. 6.8  I2C_ERR_06
    9. 6.9  I2C_ERR_07
    10. 6.10 I2C_ERR_08
    11. 6.11 I2C_ERR_09
    12. 6.12 I2C_ERR_10
    13. 6.13 LFXT_ERR_03
    14. 6.14 LFXT_ERR_04
    15. 6.15 PMCU_ERR_13
    16. 6.16 RST_ERR_01
    17. 6.17 SPI_ERR_04
    18. 6.18 SPI_ERR_05
    19. 6.19 SPI_ERR_06
    20. 6.20 SPI_ERR_07
    21. 6.21 SWD_ERR_01
    22. 6.22 SYSOSC_ERR_02
    23. 6.23 TIMER_ERR_04
    24. 6.24 TIMER_ERR_06
    25. 6.25 UART_ERR_01
    26. 6.26 UART_ERR_02
    27. 6.27 UART_ERR_04
    28. 6.28 UART_ERR_05
    29. 6.29 UART_ERR_06
    30. 6.30 UART_ERR_07
    31. 6.31 UART_ERR_08
  9. 7Trademarks
  10. 8Revision History

I2C_ERR_04

I2C Module

Category

Functional

Function

When SCL is low and SDA is high the Target i2c is not able to release the stretch.

Description

1: SCL line grounded and released, device will indefinitely pull SCL low.

2: Post clock stretch, timeout, and release; if there is another clock low on the line, device will indefinitely pull SCL low.

Workaround

If the I2C target application does not require data reception in low power mode using Async fast clock request, it is recommended to disable SWUEN by default, including during reset or power cycle. In this case, bug description 1 and 2 will not occur.

If the I2C target application requires data reception in low power mode using Async fast clock request, enable SWUEN just before entering low power and clear SWUEN after low power exit. Even in this scenario, bug description 1 and 2 can occur when the I2C target is in low power, it will indefinitely stretch the SCL line if there is a continuous clock stretching or timeout caused by another device on the bus. To recover from this situation, enable the low timeout interrupt on the I2C target device, reset and re-initialize the I2C module within the low timeout ISR.