SLLA472A March   2020  – February 2022 ISO5852S , ISO5852S-EP , ISO5852S-Q1 , LM5106

 

  1.   Trademarks
  2. 1Introduction
  3. 2Current Boost With BJT Totem Pole Stage
  4. 3Current Boost With Saturated MOSFET Totem Pole Stage
  5. 4Implementation Details
  6. 5Performance Results
  7. 6Comparison of the Two Methods
  8. 7Conclusion
  9. 8References
  10. 9Revision History

Current Boost With Saturated MOSFET Totem Pole Stage

An alternate scheme for drive current boosting is given in Figure 3-1. Two N-channel MOSFETs are used as current boosting devices. As they are operated as saturated switches, the drive current is only limited by the on-time resistance and hence can achieve much higher current levels.

GUID-314B358D-702D-42A4-B698-F2465CCB0C41-low.gif Figure 3-1 High-Current Gate Driver Using LM5106 and MOSFETs

In this circuit, signal isolation is provided by a digital isolator (ISO7721). To drive the driver MOSFETs, a low-voltage half-bridge driver IC (LM5106) is used. The power supply is the same as the previous circuit. However, a couple more LDOs are required to power the secondary side of the digital isolator and the half-bridge driver. The secondary side of the digital isolator is referred to the –6-V negative drive supply. So to power this side, a 5-V supply referred to this level is needed. This is provided by a 5-V LDO connected to the secondary return. For the gate-drive voltage for the driver MOSFETs (and the half bridge driver), a voltage of around 10 V (referred to the negative drive supply) is needed. This is generated by another 5-V LDO referred to the secondary return. This gives a total of 11 V (5 V from the LDO and 6 V from the negative drive supply) referred to as the negative drive supply.

For half-bridge drivers, typically two PWMs are required – the main PWM for the upper MOSFET and a complementary PWM for the lower MOSFET. However, the LM5106 half-bridge driver can generate the complementary signal internally with a dead-time determined by a programming resistor. This saves the need to have the complementary signal generated by the MCU. However, the half-bridge driver will need a level-shifted drive voltage to address the upper MOSFET. In this circuit, this voltage is provided by a bootstrap circuit comprising of D4, C27 , and R3 under the assumption that there is sufficient on-time for the lower MOSFET to charge. With the component values used in this circuit, the typical charging time is under 1 µs. That means, for PWM inputs with less than 1-µs off-time, the bootstrap capacitor might not be able to charge to the full supply voltage. Also, for low PWM frequencies (below a few 100 Hz), the bootstrap capacitor will not be able to hold the charge for the entire cycle. If such conditions are expected to be present, it is recommended to use an additional isolated supply to power the high-side – this can easily be generated by adding one more winding on the flyback power supply used. This will allow even 100% duty cycle operation.

The upper-side MOSFET is switched in accordance with the PWM input, while the lower MOSFET is switched based on the complementary of the PWM input resulting in output drive with the same polarity as the input PWM. As the drive current can be as high as 100 A, sufficient decoupling is required on the positive and negative drive-supply rails. If needed, additional capacitors can be added externally. This high peak current-drive capability is not required for most power devices, but by utilizing FETs of this power level, thermal dissipation can be greatly reduced when driving with peak currents of 20 A or higher. The peak current can be limited by using the external gate resistor since too high a peak current can result in undesirable ringing at the gate and uncontrolled slew rates of the power switch.