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Product details

Parameters

Number of channels (#) 1 Isolation rating (Vrms) 5700 Power switch IGBT, SiCFET Peak output current (A) 5 DIN V VDE V 0884-10 transient overvoltage rating (Vpk) 8000 DIN V VDE V 0884-10 working voltage (Vpk) 2121 Enable/disable function Output VCC/VDD (Max) (V) 30 Output VCC/VDD (Min) (V) 15 Input VCC (Min) (V) 2.25 Input VCC (Max) (V) 5.5 Prop delay (ns) 76 Operating temperature range (C) -40 to 125 open-in-new Find other Isolated gate drivers

Package | Pins | Size

SOIC (DW) 16 77 mm² 10.3 x 7.5 open-in-new Find other Isolated gate drivers

Features

  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range
    • Device HBM Classification Level 3A
    • Device CDM Classification Level C6
  • 100-kV/μs Minimum Common-Mode Transient Immunity (CMTI) at VCM = 1500 V
  • Split Outputs to Provide 2.5-A Peak Source and
    5-A Peak Sink Currents
  • Short Propagation Delay: 76 ns (Typ),
    110 ns (Max)
  • 2-A Active Miller Clamp
  • Output Short-Circuit Clamp
  • Soft Turn-Off (STO) during Short Circuit
  • Fault Alarm upon Desaturation Detection is Signaled on FLT and Reset Through RST
  • Input and Output Undervoltage Lockout (UVLO) with Ready (RDY) Pin Indication
  • Active Output Pulldown and Default Low Outputs with Low Supply or Floating Inputs
  • 2.25-V to 5.5-V Input Supply Voltage
  • 15-V to 30-V Output Driver Supply Voltage
  • CMOS Compatible Inputs
  • Rejects Input Pulses and Noise Transients Shorter Than 20 ns
  • Isolation Surge Withstand Voltage 12800-VPK
  • Safety-Related Certifications:
    • 8000-VPK VIOTM and 2121-VPK VIORM Reinforced Isolation per DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
    • 5700-VRMS Isolation for 1 Minute per UL 1577
    • CSA Component Acceptance Notice 5A, IEC 60950–1 and IEC 60601–1 End Equipment Standards
    • TUV Certification per EN 61010-1 and EN 60950-1
    • GB4943.1-2011 CQC Certification
    • All Certifications Complete per UL, VDE, CQC, TUV and Planned for CSA

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Description

The ISO5852S-Q1 device is a 5.7-kVRMS, reinforced isolated gate driver for IGBTs and MOSFETs with split outputs, OUTH and OUTL, providing 2.5-A source and 5-A sink current. The input side operates from a single 2.25-V to 5.5-V supply. The output side allows for a supply range from minimum 15 V to maximum 30 V. Two complementary CMOS inputs control the output state of the gate driver. The short propagation time of 76 ns provides accurate control of the output stage.

An internal desaturation (DESAT) fault detection recognizes when the IGBT is in an overcurrent condition. Upon a DESAT detect, a mute logic immediately blocks the output of the isolator and initiates a soft-turnoff procedure which disables the OUTH pin and pulls the OUTL pin to low over a time span of 2 μs. When the OUTL pin reaches 2 V with respect to the most-negative supply potential, VEE2, the gate-driver output is pulled hard to the VEE2 potential, turning the IGBT immediately off.

When desaturation is active, a fault signal is sent across the isolation barrier, pulling the FLT output at the input side low and blocking the isolator input. Mute logic is activated through the soft-turnoff period. The FLT output condition is latched and can be reset only after the RDY pin goes high, through a low-active pulse at the RST input.

When the IGBT is turned off during normal operation with a bipolar output supply, the output is hard clamp to VEE2. If the output supply is unipolar, an active Miller clamp can be used, allowing Miller current to sink across a low-impedance path which prevents the IGBT from dynamic turnon during high-voltage transient conditions.

The readiness for the gate driver to be operated is under the control of two undervoltage-lockout circuits monitoring the input-side and output-side supplies. If either side has insufficient supply, the RDY output goes low, otherwise this output is high.

The ISO5852S-Q1 device is available in a 16-pin SOIC package. Device operation is specified over a temperature range from –40°C to +125°C ambient.

For all available packages, see the orderable addendum at the end of the data sheet.
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Technical documentation

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Type Title Date
* Datasheet ISO5852S-Q1 High-CMTI 2.5-A and 5-A Reinforced Isolated IGBT, MOSFET Gate Driver With Split Outputs and Active Protection Features datasheet (Rev. A) Dec. 22, 2016
More literature TUV certificate for isolation devices (Rev. I) Mar. 14, 2020
Application notes External Gate Resistor Selection Guide (Rev. A) Feb. 28, 2020
Application notes Understanding Peak IOH and IOL Currents (Rev. A) Feb. 28, 2020
Application notes Comparative Analysis of Two Different Methods for Gate-Drive Current Boosting Feb. 26, 2020
More literature CSA Certification (Rev. P) Nov. 19, 2019
More literature VDE certificate for reinforced isolation for DIN VDE V 0884-11:2017-01 (Rev. N) Nov. 13, 2019
More literature CQC Certification (Rev. F) Sep. 13, 2019
More literature UL Certification (Rev. N) Jul. 30, 2019
Technical articles How to achieve higher system robustness in DC drives, part 3: minimum input pulse Sep. 19, 2018
Technical articles How to achieve higher system robustness in DC drives, part 2: interlock and deadtime May 30, 2018
Technical articles Boosting efficiency for your solar inverter designs May 24, 2018
Technical articles How to achieve higher system robustness in DC drives, part 1: negative voltage Apr. 17, 2018
Application notes Isolation Glossary (Rev. A) Sep. 19, 2017
User guides ISO5852S Evaluation Module User's Guide (Rev. A) Sep. 08, 2015

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
49
Description

This evaluation module, featuring ISO5852S reinforced isolated gate driver device, allows designers to evaluate device AC and DC performance with a pre-populated 1-nF load or with a user-installed IGBT in either of the standard TO-247 or TO-220 packages.

Features

Reinforced isolated IGBT gate driver with 2.5-A source and 5-A sink currents. The short propagation time assures accurate control of the output stage.

The input side operates from a single 2.25-V to 5.5-V supply. he output side allows for a supply range from minimum 15-V to maximum 30-V

2-A Miller (...)

Design tools & simulation

SIMULATION MODELS Download
SLLM446.ZIP (4 KB) - PSpice Model
SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)

Reference designs

REFERENCE DESIGNS Download
HEV/EV traction inverter power stage with 3 types of IGBT/SiC bias-supply solutions reference design
TIDA-020014 — This reference design presents a traction inverter single-phase power stage with three 12-V car battery inputs, 4.2-W bias supply solutions for hybrid electric vehicle and electric vehicle (HEV/EV) systems. All bias-supply solutions accept a wide input range of 4.5 V to 42 V DC from a 12-V car (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Thermal Protection Reference Design of IGBT Modules for HEV/EV Traction Inverters
TIDA-00794 The TIDA-00794 reference design is a temp sensing solution for IGBT thermal protection in HEV/EV traction inverter system. It monitors the IGBT temperature via the NTC thermistor integrated inside the IGBT module. It provides thermal shut down to the IGBT gate drivers once the NTC thermistor (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
SOIC (DW) 16 View options

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