The TCAN455x supports two modes: an external quartz crystal or an external single-ended input clock.

The internal clock circuit of the TCAN455x consists primarily of three modules: an amplifier and bias control block, a comparator and filter block, and a clock input detection block, as shown in the block diagram in Figure 3-1 below.

• The comparator compares the voltage difference between the OSC1 and OSC2 pins and generates the CLKOUT signal (from either the quartz crystal or the single-ended input clock). The comparator's positive input connects to the OSC1 pin, and its negative input connects to the OSC2 pin. In single-ended clock mode, the clock signal is applied to the OSC1 pin, and the OSC2 pin is grounded.
• The amplifier and bias control module provides the current source for crystal oscillation start-up and maintenance in quartz crystal mode. This block is disabled in single-ended clock mode. It features Automatic Gain Control (AGC) and Peak Detection (PD) circuitry that adjusts the bias current to maintain a stable oscillation of approximately 1Vpp peak-to-peak on OSC1 and OSC2, or a differential 2Vpp swing (with a 180° phase difference), as shown in Figure 3-2 below. However, actual OSC1 and OSC2 voltage amplitudes may vary depending on the external load circuit.
• The clock input detection module monitors the voltage on the OSC2 pin to determine the mode. If the OSC2 voltage is below the 90mV–150mV threshold, the device identifies single-ended input clock mode and disables the amplifier block (the customer must ground the OSC2 pin for this mode). If the OSC2 pin is not grounded and its voltage exceeds the threshold, quartz crystal clock mode is identified and the amplifier module is enabled.