SLOSEE7 May   2025 OPA810-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: 24V
    6. 6.6 Electrical Characteristics: 5V
    7. 6.7 Typical Characteristics: VS = 24V
    8. 6.8 Typical Characteristics: VS = 5V
    9. 6.9 Typical Characteristics: ±2.375V to ±12V Split Supply
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Architecture
      2. 7.3.2 ESD Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Split-Supply Operation (±2.375V to ±13.5V)
      2. 7.4.2 Single-Supply Operation (4.75V to 27V)
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Amplifier Gain Configurations
      2. 8.1.2 Selection of Feedback Resistors
      3. 8.1.3 Noise Analysis and the Effect of Resistor Elements on Total Noise
    2. 8.2 Typical Applications
      1. 8.2.1 Transimpedance Amplifier
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Multichannel Sensor Interface
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

6.5 Electrical Characteristics: 24V

at TA = 25°C, VS+ = 12V, VS– = –12V, common-mode voltage (VCM) = midsupply, RL = 1kΩ connected to midsupply; for ac specifications, gain (G) = 2V/V, RF = 1kΩ, and CL = 4.7pF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AC PERFORMANCE
SSBW Small-signal bandwidth G = 1, VO = 20mVPP, RF = 0Ω 135 MHz
G = 1, VO = 20mVPP, RF = 0Ω, CL= 10pF 140
G = –1, VO = 20mVPP 68
LSBW Large-signal bandwidth G = 2, VO = 2VPP 44 MHz
G = 2, VO = 10VPP 14
GBWP Gain-bandwidth product 70 MHz
Bandwidth for 0.1dB flatness G = 2, VO = 20mVPP 16 MHz
SR Slew rate (20%–80%)(3) G = 2, VO = –2V to +2V step 237 V/µs
G = –1, VO = –2V to +2V step 222
G = 2, VO = –4.5V to +3.5V step 254
Rise time VO = 200mV step 4 ns
Fall time VO = 200mV step 4 ns
Settling time G = 2, VO = 2V step, to 0.1% 47 ns
G = 2, VO = 10V step, to 0.1% 70
G = 2, VO = 2V step, to 0.001% 320
G = 2, VO = 10V step, to 0.001% 200
Input overdrive recovery G = 1, RF = 0Ω,
(VS–– 0.5V) to (VS+ + 0.5V) input		 35 ns
Output overdrive recovery G = –1, (VS–– 0.5V) to (VS+ + 0.5V) input 45 ns
HD2 2nd harmonic distortion f = 100kHz, VO = 2VPP –118 dBc
f = 100kHz, VO = 10VPP –108
f = 1MHz, VO = 2VPP –112
f = 1MHz, VO = 10VPP –91
HD3 3rd harmonic distortion f = 100kHz, VO = 2VPP –136 dBc
f = 100kHz, VO = 10VPP –130
f = 1MHz, VO = 2VPP –104
f = 1MHz, VO = 10VPP –91
en Input-referred voltage noise Flat-band, 1/f corner at 1.5kHz 6.3 nV/√Hz
in Input-referred current noise f = 10kHz 5 fA/√Hz
zO Closed-loop output impedance f = 100kHz 0.007 Ω
DC PERFORMANCE
AOL Open-loop voltage gain f = dc, VO = ±8V 108 120 dB
VOS Input offset voltage 100 550 µV
Input offset voltage drift TA = –40°C to +125°C 2.5 13 µV/°C
Input bias current 2 30 pA
CMRR Common-mode rejection ratio f = dc, VCM = ±5V 88 105 dB
TA = –40°C to +125°C 88
INPUT
Allowable input differential voltage See Figure 6-39 ±7 V
Common-mode input impedance In closed-loop configuration 12 || 2.5 GΩ || pF
Differential input capacitance In open-loop configuration 0.5 pF
Most positive input voltage ΔVOS < 5mV(1) VS+ + 0.2 VS+ + 0.3 V
Most negative input voltage ΔVOS < 5mV(1) VS– – 0.2 VS– – 0.3 V
OUTPUT
VOH Output voltage high RL = 667Ω VS+ – 0.33 VS+ – 0.22 V
TA = –40°C to +125°C, RL = 667Ω VS+ – 0.36
VOL Output voltage low RL = 667Ω VS– + 0.15 VS– + 0.23 V
TA = –40°C to +125°C, RL = 667Ω VS– + 0.33
IO(max) Linear output drive
(sourcing and sinking)		 VO= 7.25V, RL = 151Ω, ΔVOS < 1mV 48 64 mA
ISC Output short-circuit current 108 mA
CL Capacitive load drive < 3dB peaking, RS = 0Ω 10 pF
POWER SUPPLY
IQ Quiescent current per channel 3.8 4.7 mA
PSRR Power supply rejection ratio ΔVS = ±2V(2) 90 105 dB
TA = –40°C to +125°C 90
AUXILIARY CMOS INPUT STAGE
Gain-bandwidth product 27 MHz
Input-referred voltage noise f = 1MHz 20 nV/√Hz
Input offset voltage VCM = VS+ – 1.5V, no load 1.7 mV
(1) Change in input offset when input is biased to midsupply.
(2) Change in supply voltage from the default test condition with only one of the positive or negative supplies changing corresponding to +PSRR and −PSRR.
(3) Test levels (all values set by characterization and simulation): (A) 100% tested at 25°C, over temperature limits by characterization and simulation; (B) Not tested in production, limits set by characterization and simulation; (C) Typical value only for information.