SLOSEE7 May   2025 OPA810-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: 24V
    6. 6.6 Electrical Characteristics: 5V
    7. 6.7 Typical Characteristics: VS = 24V
    8. 6.8 Typical Characteristics: VS = 5V
    9. 6.9 Typical Characteristics: ±2.375V to ±12V Split Supply
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Architecture
      2. 7.3.2 ESD Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Split-Supply Operation (±2.375V to ±13.5V)
      2. 7.4.2 Single-Supply Operation (4.75V to 27V)
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Amplifier Gain Configurations
      2. 8.1.2 Selection of Feedback Resistors
      3. 8.1.3 Noise Analysis and the Effect of Resistor Elements on Total Noise
    2. 8.2 Typical Applications
      1. 8.2.1 Transimpedance Amplifier
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Multichannel Sensor Interface
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

6.6 Electrical Characteristics: 5V

at TA = 25°C, VS+ = 5V, VS– = 0V, common-mode voltage (VCM) = 1.25V, RL = 1kΩ connected to 1.25V; for ac specifications, VS+ = 3.5V, VS– = –1.5V, gain (G) = 2V/V, RF = 1kΩ, CL = 4.7pF, and VCM = 0V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AC PERFORMANCE
SSBW Small-signal bandwidth G = 1, VO = 20mVPP, RF = 0Ω 133 MHz
LSBW Large-signal bandwidth G = 2, VO = 2VPP 36 MHz
GBWP Gain-bandwidth product 70 MHz
Bandwidth for 0.1dB flatness G = 2, VO = 20mVPP 16 MHz
SR Slew rate (20%–80%)(3) G = 2, VO = –1V to +1V step 134 V/µs
Rise and fall time VO = 200mV step 4 ns
Settling time  G = 2, VO = –2V to 0V step, to 0.1%,
VS = ±2.5V		 100 ns
Input overdrive recovery G = 1, VS = ±2.5V,
(VS– – 0.5V) to (VS+ + 0.5V) input		 76 ns
Output overdrive recovery G = –1, VS = ±2.5V,
(VS– – 0.5V) to (VS+ + 0.5V) input		 93 ns
HD2 2nd harmonic distortion f = 100kHz, VO = 2VPP –102 dBc
HD3 3rd harmonic distortion f = 100kHz, VO = 2VPP –114 dBc
en Input-referred voltage noise Flat-band, 1/f corner at 1.5kHz 6.3 nV/√Hz
zO Closed-loop output impedance f = 100kHz 0.007 Ω
DC PERFORMANCE
AOL Open-loop voltage gain f = dc, VO = 1.25V to 3.25V 118 dB
VOS Input offset voltage 100 µV
Input offset voltage drift TA = –40°C to +125°C 2.5 µV/°C
Input bias current 2 pA
CMRR Common-mode rejection ratio f = dc, VCM = 0.75V to 1.75V 92 dB
INPUT
Allowable input differential voltage See Figure 6-39 ±5 V
Common-mode input impedance In closed-loop configuration 12 || 2.5 GΩ || pF
Differential input capacitance In open-loop configuration 0.5 pF
Most positive input voltage ΔVOS < 5mV(1) VS+ + 0.3 V
Most negative input voltage ΔVOS < 5mV(1) VS- – 0.3 V
OUTPUT
VOH Output voltage high RL = 667Ω VS+ – 0.09 V
VOL Output voltage low RL = 667Ω VS–+ 0.06 V
IO(max) Linear output drive
(sourcing and sinking)		 VO = 1.4V, RL = 27.5Ω, ΔVOS < 1mV, 
VS+ = 3V, VS– = –2V		 64 mA
ISC Output short-circuit current 96 mA
CL Capacitive load drive < 3dB peaking, RS = 0Ω 10 pF
POWER SUPPLY
IQ Quiescent current per channel 3.15 3.7 4.5 mA
PSRR Power-supply rejection ratio ΔVS = ±0.5V(2) 100 dB
(1) Change in input offset when input is biased to 0V.
(2) Change in supply voltage from the default test condition with only one of the positive or negative supplies changing corresponding to +PSRR and −PSRR.
(3) Lower of the measured positive and negative slew rate.