SLUA560D June   2011  – March 2022 UCC28950 , UCC28950-Q1 , UCC28951 , UCC28951-Q1

 

  1.   Trademarks
  2. 1 Design Specifications
  3. 2 Functional Schematic
  4. 3 Power Budget
  5. 4 Transformer Calculations (T1)
  6. 5 QA, QB, QC, QD FET Selection
  7. 6 Selecting LS
  8. 7 Output Inductor Selection (LOUT)
  9. 8 Output Capacitance (COUT)
  10. 9 Select FETs QE and QF
  11. 10Input Capacitance (CIN)
  12. 11Setting Up the Current Sense (CS) Network (CT, RS, RRE, DA)
  13. 12Voltage Loop and Slope Compensation
  14. 13Setting Turn-on Delays to Achieve Zero Voltage Switching (ZVS)
  15. 14Turning SR FETs-off Under Light Load Conditions
  16. 15600 W FSFB Detailed Schematic and Test Data
  17. 16References
  18. 17Revision History

3 Power Budget

To reach the efficiency goal in this PSFB design, careful consideration needs to be taken in selecting electrical components. The devices need to be selected based voltage rating, current rating and power dissipation. The initial step in this design process is to set a power budget (PBUDGET) which the total losses of the electrical components selected for the design cannot exceed.

Equation 1. P B U D G E T = P O U T × 1 - η η ≈ 45.2   W