SLUS720F February   2007  – June 2019 TPS40195

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Application Diagram
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Electrical Characteristics
    5. 7.5 Dissipation Ratings
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Enable Functionality
      2. 8.3.2  Voltage Reference
      3. 8.3.3  Oscillator and Synchronization
      4. 8.3.4  Undervoltage Lockout (UVLO)
      5. 8.3.5  Soft Start
      6. 8.3.6  Selecting the Short Circuit Threshold
      7. 8.3.7  5-V Regulator
      8. 8.3.8  Prebias Start-up
      9. 8.3.9  Drivers
      10. 8.3.10 Power Good
      11. 8.3.11 Thermal Shutdown
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Typical Application 1
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Output Inductor, LOUT
          2. 9.2.1.2.2 Output Capacitor, COUT
          3. 9.2.1.2.3 Input Capacitor, CIN
          4. 9.2.1.2.4 Switching MOSFET, QSW
          5. 9.2.1.2.5 Rectifier MOSFET, QSR
          6. 9.2.1.2.6 Component Selection for the TPS40195
            1. 9.2.1.2.6.1 Timing Resistor, RT
            2. 9.2.1.2.6.2 Setting UVLO
            3. 9.2.1.2.6.3 Setting the Soft-Start Time
            4. 9.2.1.2.6.4 Short-Circuit Protection, RILIM
            5. 9.2.1.2.6.5 Voltage Decoupling Capacitors, CBP, and CVDD
            6. 9.2.1.2.6.6 Boost Voltage, CBOOST and DBOOST (optional)
            7. 9.2.1.2.6.7 Closing the Feedback Loop RZ1, RP1, RPZ2, RSET1, RSET2, CZ2, CP2 AND CPZ1
          7. 9.2.1.2.7 Application Curve
      2. 9.2.2 Typical Application 2
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 Typical Application 3
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curves
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Device Support
      1. 11.2.1 Related Parts
    3. 11.3 Documentation Support
      1. 11.3.1 Related Documentation
    4. 11.4 Receiving Notification of Documentation Updates
    5. 11.5 Community Resources
    6. 11.6 Trademarks
    7. 11.7 Electrostatic Discharge Caution
    8. 11.8 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

8.3.3 Oscillator and Synchronization

The TPS40195 has a programmable switching frequency of 100 kHz to 600 kHz using a resistor connected from the RT pin to GND. The relationship between switching frequency and the resistor from RT to GND is given in Equation 1.

Equation 1. TPS40195 fsw01_lus720.gif

where

  • fSW is the switching frequency in kHz
  • RRT is the resistor connected from RT to GND in kΩ

When the oscillator is programmed using this method, the SYNC pin is configured as an input. The device may be synchronized to a higher frequency than the free running frequency by applying a pulse train to the SYNC pin. For best results, limit the frequency of the pulse train applied to SYNC to 20% more than the free running frequency. The TPS40195 will synchronize to the falling edge of the pulse train applied to the SYNC pin.

The SYNC pin can also function as an output. To get this functionality, the RT pin must be connected to either GND or to BP. When this is done the oscillator will run at either 250 kHz or 500 kHz. SYNC can then be connected to other TPS40195 controllers (with their SYNC pins configured as an input) and the two or more controllers will synchronize to the same switching frequency. The output waveform on SYNC will be approximately a 50% duty cycle pulse train. The pull up is relatively weak, but the pull down is strong to insure that a good clean signal is presented to any devices that are to be synchronized. A summary is shown in Table 1.

Table 1. RT Connection and SYNC Pin Function

RT CONNECTION SYNC PIN FUNCTION SWITCHING FREQUENCY
Resistor to GND Input See Equation 1
GND Output 250 kHz
BP Output 500 kHz

Using the TPS40195 with its RT pin connected to BP or to GND as a master clock source for another TPS40195 with a resistor connected from its RT pin to GND results in the two controllers operating at the same frequency but 180° out of phase.

TPS40195 sync2ext_lus720.gifFigure 18. TPS40195 Synchronized to External SYNC Pin Pulse (Negative Edge Triggered)
TPS40195 mstr_slv_lus720.gifFigure 19. TPS40195 SYNC Pin Master/Slave Configuration. 180° Out-of-Phase Operation