SLUSDO8A March   2020  – January 2025 BQ24800

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Device Power Up
        1. 6.3.1.1 Battery Only
        2. 6.3.1.2 Adapter Detect and ACOK Output
          1. 6.3.1.2.1 Adapter Overvoltage (ACOV)
        3. 6.3.1.3 REGN LDO
      2. 6.3.2 System Power Selection
      3. 6.3.3 Current and Power Monitor
        1. 6.3.3.1 High Accuracy Current Sense Amplifier (IADP and IDCHG)
        2. 6.3.3.2 High Accuracy Power Sense Amplifier (PMON)
      4. 6.3.4 Processor Hot Indication for CPU Throttling
      5. 6.3.5 Input Current Dynamic Power Management
        1. 6.3.5.1 Setting Input Current Limit
      6. 6.3.6 Two-Level Adapter Current Limit (Peak Power Mode)
      7. 6.3.7 EMI Switching Frequency Adjust
      8. 6.3.8 Device Protections Features
        1. 6.3.8.1 Charger Timeout
        2. 6.3.8.2 Input Overcurrent Protection (ACOC)
        3. 6.3.8.3 Charge Overcurrent Protection (CHG_OCP)
        4. 6.3.8.4 Battery Overvoltage Protection (BATOVP)
        5. 6.3.8.5 Battery Short
        6. 6.3.8.6 Thermal Shutdown Protection (TSHUT)
        7. 6.3.8.7 Inductor Short, MOSFET Short Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Battery Charging in Buck Mode
        1. 6.4.1.1 Setting the Charge Current
        2. 6.4.1.2 Setting the Charge Voltage
        3. 6.4.1.3 Automatic Internal Soft-Start Charger Current
      2. 6.4.2 Hybrid Power Boost Mode
      3. 6.4.3 Battery Only Boost Mode
        1. 6.4.3.1 Setting Minimum System Voltage in Battery Only Boost Mode
      4. 6.4.4 Battery Discharge Current Regulation in Hybrid Boost Mode and Battery Only Boost Mode
      5. 6.4.5 Battery LEARN Cycle
      6. 6.4.6 Converter Operational Modes
        1. 6.4.6.1 Continuous Conduction Mode (CCM)
        2. 6.4.6.2 Discontinuous Conduction Mode (DCM)
        3. 6.4.6.3 Non-Sync Mode and Light Load Comparator
    5. 6.5 Programming
      1. 6.5.1 SMBus Interface
        1. 6.5.1.1 SMBus Write-Word and Read-Word Protocols
        2. 6.5.1.2 Timing Diagrams
    6. 6.6 Register Maps
      1. 6.6.1  Battery-Charger Commands
      2. 6.6.2  Setting Charger Options
        1. 6.6.2.1 ChargeOption0 Register
      3. 6.6.3  ChargeOption1 Register
      4. 6.6.4  ChargeOption2 Register
      5. 6.6.5  ChargeOption3 Register
      6. 6.6.6  ProchotOption0 Register
      7. 6.6.7  ProchotOption1 Register
      8. 6.6.8  ProchotStatus Register
      9. 6.6.9  Charge Current Register
      10. 6.6.10 Charge Voltage Register
      11. 6.6.11 Discharge Current Register
      12. 6.6.12 Minimum System Voltage Register
      13. 6.6.13 Input Current Register
      14. 6.6.14 Register Exceptions
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Typical System Schematic
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1  Adapter Current Sense Filter
          2. 7.2.1.2.2  Negative Output Voltage Protection
          3. 7.2.1.2.3  Reverse Input Voltage Protection
          4. 7.2.1.2.4  Reduce Battery Quiescent Current
          5. 7.2.1.2.5  CIN Capacitance
          6. 7.2.1.2.6  L1 Inductor Selection
          7. 7.2.1.2.7  CBATT Capacitance
          8. 7.2.1.2.8  Buck Charging Internal Compensation
          9. 7.2.1.2.9  CSYS Capacitance
          10. 7.2.1.2.10 Battery Only Boost Internal Compensation
          11. 7.2.1.2.11 Power MOSFETs Selection
          12. 7.2.1.2.12 Input Filter Design
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Migration from Previous Devices (Does not Support Battery Only Boost)
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
          1. 7.2.2.2.1 CSYS Capacitance
        3. 7.2.2.3 Application Curves
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Examples
      1. 9.2.1 Layout Consideration of Current Path
      2. 9.2.2 Layout Consideration of Short Circuit Protection
      3. 9.2.3 Layout Consideration for Short Circuit Protection
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

5.5 Electrical Characteristics

VVBUS_UVLOZ < VVBUS < VVBUS_OV and VVBUS > VBAT + VSLEEP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
QUIESCENT CURRENTS
IQ_BATCurrent with battery only (TJ=0-85C), (SRP, SRN, BATSRC, PHASE, VCC, ACP, ACN)VBAT = 16.8V, VCC disconnected to battery, REG0x12[15]=15µA
VBAT = 16.8V, VCC connected to battery, REG0x12[15]=12544µA
VBAT = 16.8V, VCC connect to battery, BATFET on, REG0x12[15]=0, REGN on, Comparator and /PROCHOT enabled, PMON and boost mode disabled700800µA
VBAT = 16.8V, VCC connect to battery, BATFET on, REG0x12[15]=0, REGN on, Comparator, /PROCHOT and PMON enabled, boost mode disabled11001200µA
VBAT = 13.5V, VCC connect to battery, BATFET on, REG0x12[15]=0, REGN on, Comparator, /PROCHOT, PMON and boost mode enabled, but not switching.1.8mA
IQ_VBUSQuiescent input current (VBUS)VVCC_ULVO<VVCC<VACOVP, VACDET> 2.4V, charge disabled0.650.80mA
VVCC_ULVO<VVCC<VACOVP, VACDET >2.4V, charge enabled, no switching1.603.00mA
VVCC_ULVO<VVCC<VACOVP, VACDET >2.4V, charge enabled, switching, MOSFET Qg 4nC10mA
REGN LDO
VREGN_REGREGN Regulator VoltageVVCC =10V, VACDET>Vwakeup_RISE5.76.06.3V
IREGN_LIMREGN Current LimitVREGN = 0V, VVCC > VUVLO, in charging mode80100mA
VREGN = 0V, VVCC > VUVLO, Not in charging mode13mA
VREGN_DROPOUTREGN Output Voltage DropoutVVCC = 5V, ILOAD=20mA4.44.64.75V
IREGN_TSHUTREGN Output under thermal shutdownVREGN=5V1323mA
CREGNREGN Output CapacitorILOAD = 100uA to 50mA2µF
VCC / VBAT SUPPLY
VVBUS_OPVBUS operating range4.524V
VVCC_UVLOZ_RISEInput Undervoltage Rising ThresholdVVCC rising2.42.62.8V
VVCC_UVLOZ_FALLInput Undervoltage Falling ThresholdVVCC falling2.22.42.6V
VVCC_UVLOZ_HYSInput Undervoltage Falling HysteresisVVCC falling200mV
VSLEEP_FALLSleep Falling Threshold to turnoff ACFETVCC ramps down to SRN–4025100mV
VSLEEP_RISESleep Rising Threshold to turnon ACFETVCC ramps up above SRN280400520mV
VWAKEUP_RISEWAKEUP Detect Rising ThresholdVVCC>VVCC_UVLOZ, ACDET ramps up0.570.80V
VWAKEUP_FALLWAKEUP Detect Falling ThresholdVVCC>VVCC_UVLOZ, ACDET ramps down0.30.51V
VACOK_RISEACOK Rising ThresholdVVCC>VVCC_UVLOZ, ACDET ramps up2.3752.42.43V
VACOK_FALLACOK Falling ThresholdVVCC>VVCC_UVLOZ, ACDET ramps down2.32.3452.40V
VACOV_RISEVCC Overvoltage Rising ThresholdVCC ramps up242628V
VACOV_FALLVCC Overvoltage Falling ThresholdVCC ramps down222527V
VACNSRN_FALLACN to BAT Falling Threshold to turn on BATFETACN ramps down towards SRN120200280mV
VACNSRN_RISEACN to BAT Rising Threshold to turn off BATFETACN ramps above SRN220290360mV
VBATDEPL_FALLBattery Depletion Falling Threshold, as percentage of voltage regulation limit. Exit boost mode and learn mode.REG0x3B[15:14]=00566064%
REG0x3B[15:14]=01606568%
REG0x3B[15:14]=10646872%
REG0x3B[15:14]=11687278%
VBATDEPL_RISEBattery Depletion Rising HysteresisREG0x3B[15:14]=00285370500mV
REG0x3B[15:14]=01300390530mV
REG0x3B[15:14]=10320420565mV
REG0x3B[15:14]=11340445600mV
VBATLOWV_FALLBattery LOWV Falling ThresholdSRN ramps down2.32.52.8V
VBATLOWV_RISEBattery LOWV Rising ThresholdSRN ramps up2.7V
IBATLOWVBattery LOWV charge current limitRSR = 10 mΩ500mA
ACFET/RBFET and BATFET DRIVERS
IACFETACDRV Charge Pump Current LimitVACDRV-VCMSRC=5V4060µA
VDRV_ACFETGate Drive Voltage on ACFETVACDRV-VCMSRC when VVCC>VUVLO5.56.16.8V
RACDRV_OFFACDRV Turnoff Resistance5.06.27.4kΩ
RACDRV_GSMinimum Load between gate and source500kΩ
IBATFETBATDRV Charge Pump Current LimitVBATDRV-VBATSRC=5V4060µA
VDRV_BATFETGate Drive Voltage on BATFETVBATDRV-VBATSRC when VSRN>VBAT_UVLO5.56.16.8V
RBATDRV_OFFBATDRV Turnoff Resistance56.27.4kΩ
RBATDRV_LOADMinimum Load between gate and source500kΩ
BATTERY CHARGER
VREG_RANGETypical charge voltage regulation range1.02419.2V
VREG_STEPTypical charge voltage step16mV
VREG_ACCCharge voltage accuracyChargeVoltage() = 0x41A016.800V
-10C-85C–0.40.4%
-40C-125C–0.50.5%
ChargeVoltage() = 0x313012.592V
-10C-85C–0.40.4%
-40C-125C–0.50.5%
ChargeVoltage() = 0x20D08.400V
-10C-85C–0.40.4%
-40C-125C–0.60.6%
ChargeVoltage() = 0x10604.192V
-10C-85C–0.50.8%
-40C-125C–0.70.8%
ICHG_RANGETypical charge current regulation rangeRSR = 10 mΩ08128mA
ICHG_STEPTypical charge current regulation stepRSR = 10 mΩ64mA
ICHG_ACCCharge Current Regulation Accuracy (SRN>2V, RSR = 10 mΩ)ChargeCurrent() = 0x10004096mA
–22%
ChargeCurrent() = 0x08002048mA
–33%
ChargeCurrent() = 0x04001024mA
-55%
ChargeCurrent() = 0x0200512mA
–1010%
ChargeCurrent() = 0x0100256mA
ChargeVoltage() = 0x20D0, 0x3031, 0x41A0–1616%
ChargeVoltage() = 0x1060–2020%
ChargeCurrent() = 0x00C0192mA
–2020%
ChargeCurrent() = 0x0080128mA
–3030%
ILEAK_SRP-SRNSRP and SRN Leakage Mismatch–88µA
INPUT CURRENT REGULATION
ILIM1_RANGETypical input current regulation rangeRAC = 10 mΩ08064mA
ILIM1_STEPTypical Input Current Regulation StepRAC = 10 mΩ64mA
ILIM1_ACCInput Current Regulation Accuracy (0-85℃)RAC = 10 mΩ, InputCurrent() = 0x10004096mA
–22%
RAC = 10 mΩ, InputCurrent() = 0x08002048mA
–33%
RAC = 10 mΩ, InputCurrent() = 0x04001024mA
–55%
ILEAK_ACP-ACNACP and ACN Leakage Mismatch–55µA
PEAK POWER MODE
TOVLDPeak Power Overload PeriodREG0x38[15:14]= 000.591.00mS
REG0x38[15:14]= 011.32.0mS
REG0x38[15:14]= 103.15.0mS
REG0x38[15:14]= 117.010.1mS
TMAXPeak Power Cycle PeriodREG0x38[9:8]= 0017.02023.4mS
REG0x38[9:8]= 01344046mS
REG0x38[9:8]= 10688092mS
REG0x38[9:8]= 1193511001265mS
ILIM2_ACCPeak Current Limit AccuracyInputCurrent() = 0x1000, REG0x3C[14:11]=10016144mA
97101%
InputCurrent() = 0x0800, REG0x3C[14:11]=10013072mA
96102%
InputCurrent() = 0x0400, REG0x3C[14:11]=10011536mA
99109%
InputCurrent() = 0x0200, REG0x3C[14:11]=1001768mA
100107114%
BATTERY DISCHARGE CURRENT REGULATION (HYBRID POWER BOOST MODE)
VIDCHG_RNGDIscharge Current Regulation RangeRSR = 10 mΩ032256mA
IIDCHG_STEPDiscahrge Current Regulation StepRSR = 10 mΩ512mA
IDCHG_ACCDischarge Current Regulation AccuracyDischargeCurrent() = 0x20008192mA
–22%
DischargeCurrent() = 0x10004096mA
–33%
DischargeCurrent() = 0x08002048mA
–55%
DischargeCurrent() = 0x04001024mA
–88%
DischargeCurrent() = 0x0200512mA
–1010%
BATTERY ONLY BOOST MODE
VSYSMIN_RNGMinimum System Voltage Range (System Voltage Regulation is 1.5 or 2.3V higher)5.63213.568V
VSYSMIN_STEPTypical System Voltage Regulation Step256mV
VSYSMIN_ACCSystem Voltage Regulation AccuracyVSYSMIN() = 0x26009.728V
–2.22.8%
VSYSMIN() = 0x19806.656V
–2.22.8%
VSYSMIN_ENTERSystem Voltage Falling Threshold to enter Battery BoostAs percentage of VSYSMIN100%
CURRENT SENSE AMPLIFIER
VIADPIADP Output Voltage Range03.3V
IIADPIADP Output Current1mA
AIADPIADP Sense Amplifier GainVIADP / (VACP- VACN), REG0x12[4]=020V/V
VIADP_ACCCurrent Sense Amplifier Gain AccuracyVACP-VACN = 40mV–22%
VACP-VACN = 20mV–44%
VACP-VACN = 10mV–77%
VACP-VACN = 5mV–2020%
VACP-VACN = 2.5mV–3030%
VACP-VACN = 1.5mV–4040%
VIADP_CLAMPIADP Clamp Voltage33.3V
CIADPIADP Output Load CapacitanceWith 0 to 1mA load100pF
VIDCHGIDCHG Output Voltage Range03.3V
IIDCHGIDCHG Output Current01mA
AIDCHGCurrent Sense Amplifier GainVIDCHG / (VSRN-VSRP), REG0x12[3]=120V/V
VIDCHG_ACCCurrent Sense Output AccuracyVSRN-VSRP = 40mV–55%
VSRN-VSRP = 20mV–99%
VSRN-VSRP = 10mV–1717%
VSRN-VSRP = 5mV–3434%
VIDCHG_CLAMPIDCHG Clamp Voltage33.3V
CIDCHGIDCHG Output Load CapacitanceWith 0 to 1mA load100pF
VPMONPMON Output Voltage Range03.3V
IPMONPMON Output Current0100µA
APMONPMON System GainIPMON / (PIN+ PBAT), REG0x3B[9]=11µA/W
VPMON_ACCPMON Gain Accuracy (REG0x3B[9]=1)Adapter Only with System Power = 19.5V/45W–44%
Adapter Only with System Power = 12V/24W–66%
Adapter Only with System Power = 5V/9W–1010%
Battery Only with System Power 11V/44W–4.54.5%
Battery Only with System Power 7.4V/29.8W–77%
Battery Only with System Power 3.7V/14.4W–1010%
VPMON_CLAMPPMON Clamp Voltage33.3V
INPUT OVER-CURRENT PROTECTION
VACOCRising Threshold w.r.t. ILIM2 current limitREG0x37[9]=1190200215%
VACOC_CLAMPACOC Threshold Clamp Low ValueVACP-VACN50mV
VACOC_CLAMPACOC Threshold Clamp High ValueVACP-VACN190mV
BATTERY OVER-VOLTAGE PROTECTION
VBAT_OVPOvervoltage Rising Threshold as percentage of VBAT_REGSRN ramps up103104105%
Overvoltage Falling Threshold as percentage of VBAT_REGSRN ramps down101102103%
IBAT_OVPDischarge Resistor on SRPVSRN>6V6mA
VSRN=4.5V2mA
CONVERTER PROTECTION
VOCP_LIMITCycle by cycle Over-Current Limit, measured voltage between SRP and SRN.ChargeCurrent()=0x0xxxH546066mV
ChargeCurrent()=0x1000H-0x17C0H8090100mV
ChargeCurrent()=0x1800H-0x1FC0H110120130mV
VUCP_FALLCycle by cycle Under-Current Falling ThresholdSRP ramps down towards SRN1.059.00mV
VLL_FALL_BUCKLight Load Falling Threshold in Buck ModeSRP ramps down towards SRN1.25mV
VLL_RISE_BUCKLight Load Rising Threshold in Buck ModeSRP ramps above SRN2.5mV
VLL_FALL_BOOSTLight Load Falling Threshold in Boost ModeSRN ramps down towards SRP2.5mV
VLL_RISE_BOOSTLight Load Rising Threshold in Boost ModeSRN ramps above SRP5.0mV
INDUCTOR SHORT, MOSFET SHORT PROTECTION
VIFAULT_HI_RISEACN to PH Rising ThresholdREG0x37[7] = 04507501200mV
VIFAULT_LO_RISEPH to GND Rising ThresholdREG0x37[6] = 1180250340mV
SWITCHING CONVERTER
FSWPWM switching frequencyREG0x12[9:8] = 00510600690KHz
REG0x12[9:8] = 01680800920KHz
REG0x12[9:8] = 10255300345KHz
REG0x12[9:8] = 11340400460KHz
RDS_HI_ONHigh-side Driver (HSD) Turnon ResistanceVBTST – VPH = 5.5 V610Ω
RDS_HI_OFFHigh-side Driver Turnoff ResistanceVBTST – VPH = 5.5 V0.91.4Ω
VBTST_REFRESHBootstrap refresh comparator thresholdVBTST – VPH when LSFET refresh pulse is requested, VBUS = 5V3.854.34.7V
RDS_LO_ONLow-side Driver (LSD) Turnon Resistance7.512Ω
RDS_LO_OFFLow-side Driver Turnoff Resistance0.751.25Ω
ISTEPSoft-start Step Size64mA
tSTEPSoft-start Step Time400us
THERMAL SHUTDOWN
TSHUT_RISEThermal Shutdown Rising thresholdTemperature Increasing155°C
TSHUT_FALLThermal Shutdown Falling thresholdTemperature Decreasing135°C
PROCHOT COMPARATORS
VICRITICRIT comparator thresholdREG0x3C[14:11]=1001, as percentage of input current limit 4096mA162165168%
VINOMINOM Comparator Thresholdas percentage of input current limit 4096mA, 0x3F()=0x1000, 0x3C [0] = 0107110112%
as percentage of input current limit 4096mA, 0x3F()=0x1000, 0x3C [0] = 1104106108%
VIDCHGIDCHG comparator thresholdREG0x3D[15:11]=10000, as voltage between SRN and SRP160163.84167mV
REG0x3D[15:11]=00100, as voltage between SRN and SRP3840.9644mV
VVBATTVBATT Comparator ThresholdREG0x3C[7:6]=005.715.755.95V
REG0x3C[7:6]=015.886.006.12V
REG0x3C[7:6]=106.226.256.46V
REG0x3C[7:6]=116.486.506.72V
MISC COMPARATORS
VCMP_OSIndependent comparator Input Offset–44mV
VCMP_CMIndependent comparator Input Common-mode06.5V
VCMP_REFIndependent comparator Reference Voltage (CMPIN falling)REG0x3B[7]=02.282.32.32V
REG0x3B[7]=11.181.21.22V
VCMP_RISE_HYSTIndependent comparator Reference HysteresisREG0x3B[6]=0100mV
VILIM_FALLILIM as Converter Enable Falling ThresholdVILIM falling607590mV
VILIM_RISEILIM as Converter Enable Rising ThresholdVILIM rising90105120mV
ANALOG AND DIGITAL I/O
IAIN_ LEAKInput bias currentV = 7V–11µA
VIN_ LOInput high threshold (SDA, SCL)SDA and SCL pins0.8V
VIN_ HIInput low threshold (SDA, SCL)SDA and SCL pins2.1V
IDIN_ LEAKInput bias current (SDA, SCL)V = 7V, SDA and SCL pins–11µA
VOUT_LOOutput Saturation Voltage (ACOK, SDA, CMPOUT, /BST_STAT)5 mA drain current500mV
IOUT_LEAKLeakage Current (ACOK, SDA, CMPOUT, /BST_STAT)V = 7V–11uA
VOUT_LO_PHOutput Saturation Voltage (/PROCHOT)17mA drain current300mV
IOUT_LEAK_PHLeakage Current (/PROCHOT)V = 5.5V–11uA