SLUSDO8A March   2020  – January 2025 BQ24800

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Device Power Up
        1. 6.3.1.1 Battery Only
        2. 6.3.1.2 Adapter Detect and ACOK Output
          1. 6.3.1.2.1 Adapter Overvoltage (ACOV)
        3. 6.3.1.3 REGN LDO
      2. 6.3.2 System Power Selection
      3. 6.3.3 Current and Power Monitor
        1. 6.3.3.1 High Accuracy Current Sense Amplifier (IADP and IDCHG)
        2. 6.3.3.2 High Accuracy Power Sense Amplifier (PMON)
      4. 6.3.4 Processor Hot Indication for CPU Throttling
      5. 6.3.5 Input Current Dynamic Power Management
        1. 6.3.5.1 Setting Input Current Limit
      6. 6.3.6 Two-Level Adapter Current Limit (Peak Power Mode)
      7. 6.3.7 EMI Switching Frequency Adjust
      8. 6.3.8 Device Protections Features
        1. 6.3.8.1 Charger Timeout
        2. 6.3.8.2 Input Overcurrent Protection (ACOC)
        3. 6.3.8.3 Charge Overcurrent Protection (CHG_OCP)
        4. 6.3.8.4 Battery Overvoltage Protection (BATOVP)
        5. 6.3.8.5 Battery Short
        6. 6.3.8.6 Thermal Shutdown Protection (TSHUT)
        7. 6.3.8.7 Inductor Short, MOSFET Short Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Battery Charging in Buck Mode
        1. 6.4.1.1 Setting the Charge Current
        2. 6.4.1.2 Setting the Charge Voltage
        3. 6.4.1.3 Automatic Internal Soft-Start Charger Current
      2. 6.4.2 Hybrid Power Boost Mode
      3. 6.4.3 Battery Only Boost Mode
        1. 6.4.3.1 Setting Minimum System Voltage in Battery Only Boost Mode
      4. 6.4.4 Battery Discharge Current Regulation in Hybrid Boost Mode and Battery Only Boost Mode
      5. 6.4.5 Battery LEARN Cycle
      6. 6.4.6 Converter Operational Modes
        1. 6.4.6.1 Continuous Conduction Mode (CCM)
        2. 6.4.6.2 Discontinuous Conduction Mode (DCM)
        3. 6.4.6.3 Non-Sync Mode and Light Load Comparator
    5. 6.5 Programming
      1. 6.5.1 SMBus Interface
        1. 6.5.1.1 SMBus Write-Word and Read-Word Protocols
        2. 6.5.1.2 Timing Diagrams
    6. 6.6 Register Maps
      1. 6.6.1  Battery-Charger Commands
      2. 6.6.2  Setting Charger Options
        1. 6.6.2.1 ChargeOption0 Register
      3. 6.6.3  ChargeOption1 Register
      4. 6.6.4  ChargeOption2 Register
      5. 6.6.5  ChargeOption3 Register
      6. 6.6.6  ProchotOption0 Register
      7. 6.6.7  ProchotOption1 Register
      8. 6.6.8  ProchotStatus Register
      9. 6.6.9  Charge Current Register
      10. 6.6.10 Charge Voltage Register
      11. 6.6.11 Discharge Current Register
      12. 6.6.12 Minimum System Voltage Register
      13. 6.6.13 Input Current Register
      14. 6.6.14 Register Exceptions
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Typical System Schematic
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1  Adapter Current Sense Filter
          2. 7.2.1.2.2  Negative Output Voltage Protection
          3. 7.2.1.2.3  Reverse Input Voltage Protection
          4. 7.2.1.2.4  Reduce Battery Quiescent Current
          5. 7.2.1.2.5  CIN Capacitance
          6. 7.2.1.2.6  L1 Inductor Selection
          7. 7.2.1.2.7  CBATT Capacitance
          8. 7.2.1.2.8  Buck Charging Internal Compensation
          9. 7.2.1.2.9  CSYS Capacitance
          10. 7.2.1.2.10 Battery Only Boost Internal Compensation
          11. 7.2.1.2.11 Power MOSFETs Selection
          12. 7.2.1.2.12 Input Filter Design
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Migration from Previous Devices (Does not Support Battery Only Boost)
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
          1. 7.2.2.2.1 CSYS Capacitance
        3. 7.2.2.3 Application Curves
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Examples
      1. 9.2.1 Layout Consideration of Current Path
      2. 9.2.2 Layout Consideration of Short Circuit Protection
      3. 9.2.3 Layout Consideration for Short Circuit Protection
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

6.3.6 Two-Level Adapter Current Limit (Peak Power Mode)

An adapter can usually supply current higher than its DC rating for a few milliseconds to tens of milliseconds. The BQ24800 employs two-level input current limit, or peak power mode, to fully utilize the adapter overloading capability and minimize battery discharge. Peak power mode is enabled in REG0x38[13]. The DC current limit, or ILIM1, is the same as adapter DC current DPM, set in REG0x3F(). The overloading current, or ILIM2, is set in REG0x3C[14:11], as a percentage of ILIM1.

With peak power mode enabled, adapter current greater than ILIM1 will not immediately trigger hybrid boost supplement mode. Instead, if the adapter current remains above the ILIM1 (scaled by FDPM_RISE percentage) threshold for 50 uS, peak power mode is entered and the adapter DPM limit is raised to ILIM2 for a period of TOVLD as set in 0x38H [15:14]. During this period, hybrid boost may still be entered if it is enabled and adapter current exceeds ILIM2 (scaled by FDPM_RISE percentage) for a period of FDPM_DEG as set in REG0x37[4:3]. At the end of the TOVLD period, the BQ24800 enters a recovery period where the DPM limit is set to ILIM1 for TMAX – TOVLD. TMAX is set in REG0x38[15:14]. Once the full TMAX (overload and recovery periods) has expired, the peak power mode exits, also forcing an exit from hybrid boost mode if it is active. Upon this exit, the BQ24800 will immediately re-enter a new peak power mode cycle if adapter current remains above the ILIM1 (scaled by FDPM_RISE percentage) for the 50 uS qualifying period.

BQ24800 Two-Level Adapter Current Limit Timing Diagram, REG0x37[8] = 0Figure 6-2 Two-Level Adapter Current Limit Timing Diagram, REG0x37[8] = 0

Charging may optionally be disabled (REG0x37[8]=0) during TMAX in order to reduce adapter current during overload condition. If REG0x37[8] is instead set to 1, and if all other conditions for charging are met, including the charge inhibit bit (REG0x12[0]) being set to 0, then charging will resume during TMAX if the adapter current falls below the active current limit, which is ILIM2 during TOVLD and ILIM1 during the subsequent relaxation period.

During the peak power mode overload period ( TOVLD ), the INOM event will not trigger PROCHOT, even if the event is enabled and adapter current exceeds the INOM threshold. The ICRIT event remains active during this time. During the recovery period ( TMAX - TOVLD ), both the INOM and ICRIT events are active if enabled.

The peak power mode timing parameters (TOVLD and TMAX) are not allowed to be changed while peak power mode is enabled. Any write to either 0x38H [15:14] (TOVLD) or 0x38H [9:8] (TMAX) while the peak power mode is enabled (0x38 [13] = 1) will be ignored. In order to change these parameters, the user must first disable peak power mode by writing 0x38 [13] = 0, then update TOVLD and/or TMAX, and then re-enable the peak power mode by writing 0x38 [13] = 1.