SLUSDO8A March   2020  – January 2025 BQ24800

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Device Power Up
        1. 6.3.1.1 Battery Only
        2. 6.3.1.2 Adapter Detect and ACOK Output
          1. 6.3.1.2.1 Adapter Overvoltage (ACOV)
        3. 6.3.1.3 REGN LDO
      2. 6.3.2 System Power Selection
      3. 6.3.3 Current and Power Monitor
        1. 6.3.3.1 High Accuracy Current Sense Amplifier (IADP and IDCHG)
        2. 6.3.3.2 High Accuracy Power Sense Amplifier (PMON)
      4. 6.3.4 Processor Hot Indication for CPU Throttling
      5. 6.3.5 Input Current Dynamic Power Management
        1. 6.3.5.1 Setting Input Current Limit
      6. 6.3.6 Two-Level Adapter Current Limit (Peak Power Mode)
      7. 6.3.7 EMI Switching Frequency Adjust
      8. 6.3.8 Device Protections Features
        1. 6.3.8.1 Charger Timeout
        2. 6.3.8.2 Input Overcurrent Protection (ACOC)
        3. 6.3.8.3 Charge Overcurrent Protection (CHG_OCP)
        4. 6.3.8.4 Battery Overvoltage Protection (BATOVP)
        5. 6.3.8.5 Battery Short
        6. 6.3.8.6 Thermal Shutdown Protection (TSHUT)
        7. 6.3.8.7 Inductor Short, MOSFET Short Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Battery Charging in Buck Mode
        1. 6.4.1.1 Setting the Charge Current
        2. 6.4.1.2 Setting the Charge Voltage
        3. 6.4.1.3 Automatic Internal Soft-Start Charger Current
      2. 6.4.2 Hybrid Power Boost Mode
      3. 6.4.3 Battery Only Boost Mode
        1. 6.4.3.1 Setting Minimum System Voltage in Battery Only Boost Mode
      4. 6.4.4 Battery Discharge Current Regulation in Hybrid Boost Mode and Battery Only Boost Mode
      5. 6.4.5 Battery LEARN Cycle
      6. 6.4.6 Converter Operational Modes
        1. 6.4.6.1 Continuous Conduction Mode (CCM)
        2. 6.4.6.2 Discontinuous Conduction Mode (DCM)
        3. 6.4.6.3 Non-Sync Mode and Light Load Comparator
    5. 6.5 Programming
      1. 6.5.1 SMBus Interface
        1. 6.5.1.1 SMBus Write-Word and Read-Word Protocols
        2. 6.5.1.2 Timing Diagrams
    6. 6.6 Register Maps
      1. 6.6.1  Battery-Charger Commands
      2. 6.6.2  Setting Charger Options
        1. 6.6.2.1 ChargeOption0 Register
      3. 6.6.3  ChargeOption1 Register
      4. 6.6.4  ChargeOption2 Register
      5. 6.6.5  ChargeOption3 Register
      6. 6.6.6  ProchotOption0 Register
      7. 6.6.7  ProchotOption1 Register
      8. 6.6.8  ProchotStatus Register
      9. 6.6.9  Charge Current Register
      10. 6.6.10 Charge Voltage Register
      11. 6.6.11 Discharge Current Register
      12. 6.6.12 Minimum System Voltage Register
      13. 6.6.13 Input Current Register
      14. 6.6.14 Register Exceptions
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Typical System Schematic
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1  Adapter Current Sense Filter
          2. 7.2.1.2.2  Negative Output Voltage Protection
          3. 7.2.1.2.3  Reverse Input Voltage Protection
          4. 7.2.1.2.4  Reduce Battery Quiescent Current
          5. 7.2.1.2.5  CIN Capacitance
          6. 7.2.1.2.6  L1 Inductor Selection
          7. 7.2.1.2.7  CBATT Capacitance
          8. 7.2.1.2.8  Buck Charging Internal Compensation
          9. 7.2.1.2.9  CSYS Capacitance
          10. 7.2.1.2.10 Battery Only Boost Internal Compensation
          11. 7.2.1.2.11 Power MOSFETs Selection
          12. 7.2.1.2.12 Input Filter Design
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Migration from Previous Devices (Does not Support Battery Only Boost)
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
          1. 7.2.2.2.1 CSYS Capacitance
        3. 7.2.2.3 Application Curves
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Examples
      1. 9.2.1 Layout Consideration of Current Path
      2. 9.2.2 Layout Consideration of Short Circuit Protection
      3. 9.2.3 Layout Consideration for Short Circuit Protection
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

6.6.5 ChargeOption3 Register

Figure 6-9 ChargeOption3 Register (0x37)
15141312111098
EN_IDCHG_REGReservedACDRV_OFFACOK_DEGACOK_STATEN_ACOCACOC_VTHPKPWR_ENCHRG
R/WRR/WR/WRR/WR/WR
76543210
IFAULT_HIIFAULT_LOFDPDM_RISEFDPM_DEGEN_HYBRID_BOOSTBOOST_STATFPDM_FALL
R/WR/WR/WR/WR/WRR/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 6-9 ChargeOption3 Register (0x37)
BITBIT NAMEDESCRIPTION
[15]Discharge Current Regulation Enable
(EN_IDCHG_REG)		Battery discharge current regulation enable.
0: Disable discharge current regulation (default at POR)
1: Enable discharge current regulation
[14]Reserved0 - Reserved
[13]ACDRV Disable (ACDRV_OFF)Force ACFET/RBFET to turn off, even with good adapter present.
0: ACFET/RBFET control based on "System Power Selection". (default at POR)
1: Turn off ACFET/RBFET.
[12]ACOK Deglitch Time for Primary Input
(ACOK_DEG )		Adjust ACOK rising edge deglitch time.
After POR, the first time adapter plugs in, deglitch time is always 150 ms if this register has not been written by the host. Starting from the 2nd time adapter plugs in, the deglitch time follows the bit setting.
0: ACOK rising edge deglitch time 150ms
1: ACOK rising edge deglitch time 1.3 sec (default at POR)
[11]Adapter Present Indicator
(ACOK_STAT )		Input present indication bit. This bit is set to 1 when ACOK pin goes HIGH. Refer to for conditions to transition ACOK.
0: AC adapter is not present
1: AC adapter is present
[10]ACOC Enable
(EN_ACOC)		ACOC protection threshold by monitoring ACP_ACN voltage.
0: Disable ACOC (default at POR)
1: Enable ACOC
[9]ACOC Limit
(ACOC_VTH)		ACOC protection threshold by monitoring ACP_ACN voltage.
0: 125% of ILIM2
1: 200% of ILIM2 (default at POR)
[8]PKPWR_ENCHRGAllow battery charging during peak power TMAX cycle.
0: Battery charging is NOT allowed during TMAX. The adapter only supports system load. This reduces the chance of overloading the adapter. (default at POR)
1: Battery charging is allowed during TMAX. The adapter current capability of ILIM1 and ILIM2 is fully utilized.
[7]HSFET VDS Threshold
(IFAULT_HI)		MOSFET/inductor short protection by monitoring ACN to PHASE voltage
0: Disable (default at POR)
1: 750 mV
[6]LSFET VDS Threshold
(IFAULT_LO)		MOSFET/inductor short protection by monitoring PHASE to GND voltage (LSFET drain-source voltage.) Also provides cycle-by-cycle current limit protection during hybrid boost and battery only boost functions.
0: Disable
1: 250 mV (default at POR)
[5]Hybrid Power Boost Mode Entry Threshold
(FDPM_RISE)		Fast DPM comparator threshold to enter hybrid power boost mode. (Minimum REG0x3F DPM setting for boost mode: 1536 mA). The threshold is set as percentage to the input current limit. When peak power is not enabled, the input current limit is ILIM1, set in REG0x3F(). When the device is in TOVLD of peak power mode cycle, input current limit is ILIM2, and the threshold is 107% of ILIM2. For the rest of peak power mode cycle, input current limit is ILIM1.
0: 107%
1: 104%
Refer to Table 6-2 for allowed conditions to set this bit to 1.
[4:3]Fast DPM Deglitch
Time (FDPM_DEG)		Response time from system current exceeding Fast DPM Threshold to battery discharge in boost mode.
00: Response time 150 µs (default at POR)
01: Response time 250 µs
1X: Response time 50 µs
[2]Hybrid Power Boost Mode
Enable(EN_HYBRID_BOOST)		Hybrid power boost mode enable bit. When BATPRES goes from LOW to HIGH (battery removal), this bit will be reset to zero to disable boost mode. When the charger exits hybrid power boost due to smaller load or fault, this enable bit doesn't automatically go to zero.
0: Disable hybrid power boost mode (default at POR)
1: Enable hybrid power boost mode
[1]Boost Mode Indication
(BOOST_STAT)		Active-high boost mode indicator. This bit is read only.
0: Charger is not in hybrid power boost mode or battery only boost mode (default at POR)
1: Charger is in hybrid power boost mode or battery only boost mode (Note that the BST_STAT pin is active-low and is low when the BOOST_STAT register bit is set to 1.)
[0]Hybrid Power Boost Mode Exit Threshold
(FDPM_FALL)		Fast DPM comparator threshold to exit hybrid power boost mode.
0: 93% (default at POR)
1: 96%