SLUSDU8G September   2019  – January 2025 TPS62860 , TPS62861

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Soft Start
      2. 7.3.2 Output Voltage Selection (VSEL) for TPS62860x
      3. 7.3.3 Output Voltage Selection (VSEL and I2C)
      4. 7.3.4 Undervoltage Lockout (UVLO)
      5. 7.3.5 Power Good (PG)
      6. 7.3.6 Switch Current Limit and Short Circuit Protection
      7. 7.3.7 Thermal Shutdown
      8. 7.3.8 Output Voltage Discharge
    4. 7.4 Device Functional Modes
      1. 7.4.1 Smart Enable and Shutdown (EN)
      2. 7.4.2 Forced PWM Operation
      3. 7.4.3 Forced PWM Mode During Output Voltage Change
      4. 7.4.4 Power Save Mode
    5. 7.5 Programming
      1. 7.5.1 Serial Interface Description
      2. 7.5.2 Standard- and Fast-Mode Protocol
      3. 7.5.3 I2C Update Sequence
      4. 7.5.4 I2C Register Reset
  9. 8 Register Map
    1. 8.1 I2C Address Byte
    2. 8.2 Register Address Byte
    3. 8.3 VOUT Register 1
    4. 8.4 VOUT Register 2
    5. 8.5 CONTROL Register
    6. 8.6 STATUS Register
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application, TPS628610
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Input Capacitor Selection
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application, TPS628600, TPS62860x
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
      3. 9.3.3 Application Curves
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

8.5 CONTROL Register

Table 8-4 CONTROL Register Description
REGISTER ADDRESS 0X03 READ/WRITE
BIT FIELD TYPE DEFAULT DESCRIPTION
7 Reset W 0 1 - Reset all registers to default.
This bit triggers a shutdown followed by a re-reading of the internal OTP settings and a new soft start.
6 Enable FPWM Mode during Output Voltage Change R/W 1 0 - Keep the current mode status during output voltage change.
1 - Force the device in FPWM during output voltage change.
5 Software Enable Device R/W 1 0 - Disable the device. All registers values are still kept.
1 - Re-enable the device with a new start-up without the tDelay period.
4 Enable FPWM Mode R/W 0 0 - Set the device in power save mode at light loads.
1 - Set the device in forced PWM mode at light loads.
3 Enable Output Discharge R/W 1 0 - Disable output discharge.
1 - Enable output discharge.
This setting is used for the next disable cycle (Software or Hardware).
2 Reserved
0:1 Voltage Ramp Speed R/W 11(1) 00 - 10mV/µs
01 - 5 mV/µs
10 - 1 mV/µs
11 - 0.1 mV/µs
(1) The default value is programmed with 00 for TPS628603