SLUSF69A May   2024  – January 2025 BQ25186

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Thermal Information
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
      1. 6.1.1 Battery Charging Process
        1. 6.1.1.1 Trickle Charge
        2. 6.1.1.2 Pre-Charge
        3. 6.1.1.3 Fast Charge
        4. 6.1.1.4 Termination
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Input Voltage Based Dynamic Power Management (VINDPM)
      2. 6.3.2  Dynamic Power Path Management Mode (DPPM)
      3. 6.3.3  Battery Supplement Mode
      4. 6.3.4  Sleep Mode
      5. 6.3.5  SYS Power Control (SYS_MODE bit control)
        1. 6.3.5.1 SYS Pulldown Control
      6. 6.3.6  SYS Regulation
      7. 6.3.7  ILIM Control
      8. 6.3.8  Protection Mechanisms
        1. 6.3.8.1 Input Overvoltage Protection
        2. 6.3.8.2 Battery Undervoltage Lockout
        3. 6.3.8.3 Battery Overcurrent Protection
        4. 6.3.8.4 System Overvoltage Protection
        5. 6.3.8.5 System Short Protection
        6. 6.3.8.6 Thermal Protection and Thermal Regulation
        7. 6.3.8.7 Safety Timer and Watchdog Timer
      9. 6.3.9  Pushbutton Wake and Reset Input
        1. 6.3.9.1 Pushbutton Wake or Short Button Press Functions
        2. 6.3.9.2 Pushbutton Reset or Long Button Press Functions
      10. 6.3.10 15-Second Timeout for HW Reset
      11. 6.3.11 Hardware Reset
      12. 6.3.12 Software Reset
      13. 6.3.13 Interrupt Indicator (/INT) Pin
      14. 6.3.14 Power Good (PG) / General Purpose Output Pin
      15. 6.3.15 External NTC Monitoring (TS)
        1. 6.3.15.1 TS Biasing and Function
      16. 6.3.16 I2C Interface
        1. 6.3.16.1 F/S Mode Protocol
    4. 6.4 Device Functional Modes
    5. 6.5 Register Maps
      1. 6.5.1 I2C Registers
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

6.3.10 15-Second Timeout for HW Reset

Based on the I2C register bit WATCHDOG_15S_ENABLE the device can perform HW reset/power cycle in the same manner a long button press or HW_RESET would. This 15-second watchdog or timeout is gated upon VIN> VVBAT + VSLEEP so that the HW reset would only occur if the host does not respond after a charger is connected and the

If the charger is connected and the host responds before the 15-second watchdog expires, the part continues in normal operation and starts the normal 50-second watchdog timer if enabled. The 15-second watchdog may be enabled/ disabled through I2C through the WATCHDOG_15S_ENABLE bit.