SLUSFM5 March   2025 BQ76907-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information BQ76907-Q1
    5. 6.5  Supply Current
    6. 6.6  Digital I/O
    7. 6.7  REGOUT LDO
    8. 6.8  Voltage References
    9. 6.9  Coulomb Counter
    10. 6.10 Coulomb Counter Digital Filter
    11. 6.11 Current Wake Detector
    12. 6.12 Analog-to-Digital Converter
    13. 6.13 Cell Voltage Measurement Accuracy
    14. 6.14 Cell Balancing
    15. 6.15 Internal Temperature Sensor
    16. 6.16 Thermistor Measurement
    17. 6.17 Hardware Overtemperature Detector
    18. 6.18 Internal Oscillator
    19. 6.19 Charge and Discharge FET Drivers
    20. 6.20 Comparator-Based Protection Subsystem
    21. 6.21 Timing Requirements - I2C Interface, 100kHz Mode
    22. 6.22 Timing Requirements - I2C Interface, 400kHz Mode
    23. 6.23 Timing Diagram
    24. 6.24 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Configuration
      1. 7.3.1 Commands and Subcommands
      2. 7.3.2 Configuration Using OTP or Registers
      3. 7.3.3 Device Security
    4. 7.4 Device Hardware Features
      1. 7.4.1  Voltage ADC
      2. 7.4.2  Coulomb Counter and Digital Filters
      3. 7.4.3  Protection FET Drivers
      4. 7.4.4  Voltage References
      5. 7.4.5  Multiplexer
      6. 7.4.6  LDOs
      7. 7.4.7  Standalone Versus Host Interface
      8. 7.4.8  ALERT Pin Operation
      9. 7.4.9  Low Frequency Oscillator
      10. 7.4.10 I2C Serial Communications Interface
    5. 7.5 Measurement Subsystem
      1. 7.5.1 Voltage Measurement
        1. 7.5.1.1 Voltage ADC Scheduling
        2. 7.5.1.2 Unused VC Pins
        3. 7.5.1.3 General Purpose ADCIN Functionality
      2. 7.5.2 Current Measurement and Charge Integration
      3. 7.5.3 Internal Temperature Measurement
      4. 7.5.4 Thermistor Temperature Measurement
      5. 7.5.5 Factory Trim and Calibration
    6. 7.6 Protection Subsystem
      1. 7.6.1 Protections Overview
      2. 7.6.2 Primary Protections
      3. 7.6.3 CHG Detector
      4. 7.6.4 Cell Open-Wire Protection
      5. 7.6.5 Diagnostic Checks
    7. 7.7 Cell Balancing
    8. 7.8 Device Operational Modes
      1. 7.8.1 Overview of Operational Modes
      2. 7.8.2 NORMAL Mode
      3. 7.8.3 SLEEP Mode
      4. 7.8.4 DEEPSLEEP Mode
      5. 7.8.5 SHUTDOWN Mode
      6. 7.8.6 CONFIG_UPDATE Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Performance Plot
      4. 8.2.4 Random Cell Connection Support
      5. 8.2.5 Startup Timing
      6. 8.2.6 FET Driver Turn-Off
      7. 8.2.7 Usage of Unused Pins
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

6.12 Analog-to-Digital Converter

Typical values stated where TA = 25°C and VBAT = 25.9V, min/max values stated where TA = -40°C to 125°C and VBAT = 3V to 38.5V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V(ADC_IN_CELLS) Input voltage range (differential cell input mode) (2) (4) Internal reference (Vref = VREF1) –0.2 5.5 V
V(ADC_IN) Input voltage range (ADCIN measurement mode)(2)(6) Internal reference (Vref = VREF1, Settings:Configuration:DA Config[TSMODE] = 1), applicable to ADCIN measurements using the TS pin –0.2 1.8 V
V(ADC_IN_TS) Input voltage range (external thermistor measurement mode)(2)(5) Regulator reference (Vref = VREG18, Settings:Configuration:DA Config[TSMODE] = 0), applicable to external thermistor measurement using the TS pin –0.2 1.8 V
V(ADC_IN_DIV) Input voltage range (divider measurement mode)(2)(7) Internal reference (Vref = VREF1), applicable to divider measurements using the VC7 pin relative to VSS. 2.0 38.5 V
B(ADC_OFF_CELL) Differential cell offset error 16-bit, uncalibrated, with VC7 - VC6 = 0V, VC6 = 24V, using raw ADC codes -0.5 LSB (4)
B(ADC_OFF_DRIFT_CELL) Differential cell offset error drift(3) 16-bit, uncalibrated, with VC7 - VC6 = 0V, VC6 = 4V, using raw ADC codes, over -40°C to +125°C -0.27 0.24 LSB/°C (4)
B(ADC_OFF) TS offset error (1) 16-bit, uncalibrated, using Vref = VREG18 -33 4.2 44 LSB(6)
B(ADC_OFF_DIV) Divider offset error 16-bit, uncalibrated, using divider mode on VC7 -3.7 LSB(7)
G(ADC_TS_REG18) Gain of ADC TS pin measurement using Vref = VREG18 (9) Reported digital code = G(ADC_TS_REG18) × VTS / VREG18.   16-bit, uncalibrated, using TS pin, VTS = 1.5V. 19172 19416 19684 N/A (5)
G(ADC_TS_ADCIN) Gain of ADC TS pin measurement using Vref = VREF1 (9) Reported digital code = G(ADC_TS_ADCIN) × VTS.   16-bit, uncalibrated, using TS pin, VTS = 1.5V. 15732 16020 16272 LSB/V (6)
G(ADC_CELL_RAW) Raw gain of ADC cell voltage measurement (9) Gain measured 16-bit, using 2.0V and 4.0V differential cell input mode on VC7 - VC6, uncalibrated, using raw ADC codes. 5465 5477 5490 LSB/V (4)
R(ADC_IN_CELL) Effective input resistance(8) Differential cell input mode on VC7 - VC6 4 MΩ
R(ADC_IN_TOS) Effective input resistance Divider measurement on VC7 pin (only active while the pin is being measured) 600 kΩ
I(LEAKAGE) Pin leakage current (3) Input current per pin into VC1 ~ VC7, BAT, REGSRC, with no conversions, stack biased with 5V / cell, VBAT = 30V, device in SHUTDOWN mode. 2 µA
B(ADC_RES_SLOW) Effective resolution with slow speed setting(1) Single conversion, in NORMAL mode, Settings:Configuration:Power Config[SSADCSPEED] = 0x0, using TS input in ADCIN mode. 15 bits
B(ADC_RES_MEDSLOW) Effective resolution with medium slow speed setting(1) Single conversion, in NORMAL mode, Settings:Configuration:Power Config[SSADCSPEED] = 0x1, using TS input in ADCIN mode. 14 bits
B(ADC_RES_MEDFAST) Effective resolution with medium fast speed setting(1) Single conversion, in NORMAL mode, Settings:Configuration:Power Config[SSADCSPEED] = 0x2, using TS input in ADCIN mode. 13 bits
B(ADC_RES_FAST) Effective resolution with fast speed setting(1) Single conversion, in NORMAL mode, Settings:Configuration:Power Config[SSADCSPEED] = 0x3, using TS input in ADCIN mode. 11 bits
t(ADC_CONV_SLOW) Conversion-time Single conversion, in NORMAL mode, Settings:Configuration:Power Config[CVADCSPEED] and [SSADCSPEED] = 0x0 2.93 ms
t(ADC_CONV_MEDSLOW) Conversion-time in medium slow mode Single conversion, in NORMAL mode, Settings:Configuration:Power Config[CVADCSPEED] and [SSADCSPEED] = 0x1 1.46 ms
t(ADC_CONV_MEDFAST) Conversion-time in medium fast mode Single conversion, in NORMAL mode, Settings:Configuration:Power Config[CVADCSPEED] and [SSADCSPEED] = 0x2 732 µs
t(ADC_CONV_FAST) Conversion-time in fast mode Single conversion, in NORMAL mode, Settings:Configuration:Power Config[CVADCSPEED] and [SSADCSPEED] = 0x3 366 µs
VSTACK(ACC) Stack voltage (VC7 - VVSS) measurement accuracy (9) 3V ≤ VVC7 - VVSS ≤ 38.5V, TA = 25°C, specified using an input network of 20Ω and 220nF. –37 28 mV
3V ≤ VVC7 - VVSS ≤ 38.5V, TA = -20°C to 65°C, specified using an input network of 20Ω and 220nF. –162 168 mV
3V ≤ VVC7 - VVSS ≤ 38.5V, TA = -40°C to 125°C, specified using an input network of 20Ω and 220nF. –380 215 mV
(1) Effective resolution is defined as the resolution such that the data exhibits 1-sigma variation within ±1-LSB.
(2) Specified by design
(3) Specified by characterization
(4) The 16-bit LSB size of the differential cell voltage raw codes measurement is given by 1 LSB = 1V / G(ADC_CELL_RAW) ≈ 1V / 5479 LSB/V = 182.5µV
(5) Assuming a nominal value of VREG18 = 1.8V, the 16-bit LSB size of the TS pin voltage measurement in thermistor mode is given by 1 LSB = VREG18 / G(ADC_TS_REG18) ≈ 1.8V / 19405 = 93µV
(6) The 16-bit LSB size of the TS pin voltage measurement in ADCIN mode is given by 1 LSB = 1V / G(ADC_TS_ADCIN) ≈ 1V / 16027 = 62µV
(7) The 16-bit LSB size of the divider voltage measurement is given by 1 LSB = 50 x VREF1 / 2N-1 ≈ 50 x 1.1962V / 215 = 1.825mV
(8) Average effective differential input resistance with device operating in NORMAL mode, cell balancing disabled, and a 5V differential voltage applied.
(9) Specified by a combination of characterization and production test