SLUSFU6A September   2025  – November 2025 UCC27834-Q1 , UCC27884-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Dynamic Electrical Characteristics
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Stages and Interlock
      2. 6.3.2 Undervoltage Lockout (UVLO)
      3. 6.3.3 Level Shifter
      4. 6.3.4 Output Stage
      5. 6.3.5 Low Propagation Delays and Tightly Matched Outputs
      6. 6.3.6 HS Node dV/dt
      7. 6.3.7 Operation Under Negative HS Voltage Condition
    4. 6.4 Device Functional Modes
      1. 6.4.1 Input and Output Logic Table
      2. 6.4.2 Operation Under 100% Duty Cycle Condition
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Selecting HI and LI Low Pass Filter Components (RHI, RLI, CHI, CLI)
        2. 7.2.2.2 Selecting Bootstrap Capacitor (CBOOT)
        3. 7.2.2.3 Selecting VDD Bypass Capacitor (CVDD)
        4. 7.2.2.4 Selecting Bootstrap Resistor (RBOOT)
        5. 7.2.2.5 Selecting Gate Resistor RON/ROFF
        6. 7.2.2.6 Selecting Bootstrap Diode
        7. 7.2.2.7 Estimate the UCC278X4-Q1 Power Losses
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

7.2.2 Detailed Design Procedure

This procedure outlines the steps to design a 200V half-bridge gate driver with 3.5A source and 4.0A sink current capability, targeted to drive power MOSFETs or IGBTs using the UCC278X4-Q1. Refer to Figure 7-1 for component names and network locations.