SLUSG02 May   2025 TPS6286A06D

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
  7. Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Save Mode (PFM)
      2. 7.3.2 Forced PWM Mode
      3. 7.3.3 Low Dropout Operation (100% Duty Cycle)
      4. 7.3.4 Soft Start
      5. 7.3.5 Switch Current Limit and HICCUP Short-Circuit Protection
      6. 7.3.6 Undervoltage Lockout
      7. 7.3.7 Thermal Warning and Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable and Disable (EN)
      2. 7.4.2 Output Discharge
      3. 7.4.3 Power Good (PG)
      4. 7.4.4 Voltage Setting and Mode Selection (VSET/MODE)
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Setting the Output Voltage
        3. 8.2.2.3 Output Filter Design
        4. 8.2.2.4 Inductor Selection
        5. 8.2.2.5 Capacitor Selection
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
        1. 8.4.2.1 Thermal Considerations
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Voltage Setting and Mode Selection (VSET/MODE)

The TPS6286A06D device is configurable as either an adjustable output voltage or a fixed output voltage, depending on the needs of each individual application. This feature simplifies the logistics during mass production, as one part number offers several fixed output voltage options as well as an adjustable output voltage option.

If an external resitor to ground is connected to the VSET/MODE pin, the device configuration is set by the value of this external resistor through an internal R2D (resistor to digital) converter during the enable delay (tDelay) time-interval. If the VSET/MODE pin left unconnected, connected to ground or connected to VIN, the output voltage is adjustable through a resistive divider on the FB pin. Table 7-2 shows the options. The R2D read out configures the positive input to the error amplifier (EA) to be either the VFB voltage (0.6V typical) or the selected output voltage.

Table 7-2 Voltage Selection Table
RESISTOR (E96 SERIES, ±1% ACCURACY) AT VSET/MODE PIN, 200ppm/°C OR BETTERFIXED OR ADJUSTABLE OUTPUT VOLTAGE
249kΩ, logic high or floatingAdjustable (through a resistive divider on the FB pin)
205kΩ1.60V
162kΩ1.50V
133kΩ1.35V
105kΩ1.20V
86.6kΩReserved
68.1kΩ1.00V
56.2kΩ0.90V
44.2kΩ0.85V
36.5kΩ0.80V
28.7kΩ0.70V
23.7kΩ0.60V
18.7kΩ0.50V
15.4kΩ0.45V
12.1kΩ0.40V
10kΩ or logic lowAdjustable (through a resistive divider on the FB pin)

The R2D converter has an internal current source that applies current through the external resistor and an internal ADC that reads back the resulting voltage level. Depending on the level, the output voltage is set. After this R2D conversion is finished, the current source is turned off to avoid current flowing through the external resistor. Make sure that the additional leakage current path is less than 20nA and the capacitance is less than 30pF from this pin to GND during R2D conversion. Otherwise, a false value is set. For more details, refer to Benefits of a Resistor-to-Digital Converter in Ultra-Low Power Supplies white paper.

When the device is set as a fixed output voltage converter, then FB pin must be connected to the output directly. Refer to Figure 7-3.

After the start-up period (tStartup), a different operation mode can be selected. When VSET/MODE is pulled high, the device operates in forced PWM mode. When VSET/MODE is pulled low or left floating, the device operates in Power Save mode.

TPS6286A06D TPS6286A06D Typical
                    Application - Fixed Output VoltageFigure 7-3 TPS6286A06D Typical Application - Fixed Output Voltage