SLUUDA5 June   2025 TPS4812-Q1

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Overview
    2. 2.2 General Configurations
      1. 2.2.1 Physical Access
      2. 2.2.2 Test Equipment and Setup
        1. 2.2.2.1 Power Supplies
        2. 2.2.2.2 Meters
        3. 2.2.2.3 Oscilloscope
        4. 2.2.2.4 Loads
  8. 3Implementation Results
    1. 3.1 Test Setup and Procedures
      1. 3.1.1 Power-up with EN Control
      2. 3.1.2 Overcurrent Protection Test
  9. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
    3. 4.3 Bill Of Materials (BoM)
  10. 5Additional Information
    1.     Trademarks

2.1 Overview

The TPS4812Q1EVM evaluation board enables evaluation of TPS48120-Q1 driver. The input power is applied between connectors J1 and J4 while J2 and J3 provide an output connection to the load. Refer to the schematic in Figure 4-1 and EVM test setup in Figure 3-1.

D8 provides the fault indication output for charge pump UVLO, MAIN FET short-circuit fault, I2t timer trigger, NTC based external FET overtemperature fault.

Table 2-1 TPS4812Q1EVM Evaluation Board Options and Setting
Part NumberEVM FunctionVin RangeVin UVLO

ENABLE

(EN/UVLO)

Short Circuit Protection

Features
Low SettingHi Setting
TPS4812Q1EVMSmart high side driver with reverse polarity protection, short-circuit protection and diagnostics24V–54V24VActive high

16A

36A

High Side Sensing

Bi-directional current monitoring

Low Power Mode

I2t Overcurrent and Short-circuit protection with auto-retry/ latch response