SLVSCV8E December 2015 – June 2025 TPS4H160-Q1
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| td(on) | Delay time, VOUTx 10% after VINx↑ (See Figure 6-1.) | VVS = 13.5 V, VDIAG_EN = 5 V, IOUTx = 0.5 A, IN rising edge to 10% of VOUTx | 20 | 50 | 90 | µs |
| td(off) | Delay time, VOUTx 90% after VINx↓ (See Figure 6-1.) | VVS = 13.5 V, VDIAG_EN = 5 V, IOUTx = 0.5 A, IN falling edge to 90% of VOUTx | 20 | 50 | 90 | µs |
| dV/dt(on) | Turnon slew rate | VVS = 13.5 V, VDIAG_EN = 5 V, IOUTx = 0.5 A, VOUTx from 10% to 90% | 0.1 | 0.3 | 0.55 | V/µs |
| dV/dt(off) | Turnoff slew rate | VVS = 13.5 V, VDIAG_EN = 5 V, IOUTx = 0.5 A, VOUTx from 90% to 10% | 0.1 | 0.3 | 0.55 | V/µs |
| td(match) | td(rise) – td(fall) (See Figure 6-1.) | VVS = 13.5 V, IL = 0.5A. td, rise is the IN rising edge to VOUTx = 90%. td(fall) is the IN falling edge to VOUTx = 10%. | –50 | 50 | µs | |
| CURRENT-SENSE CHARACTERISTICS (See Figure 6-2.) | ||||||
| tCS(off1) | CS settling time from DIAG_EN disabled(1) | VVS = 13.5 V, VINx = 5 V, IOUTx = 0.5 A. current limit = 2 A. DIAG_EN falling edge to 10% of VCS. | 20 | µs | ||
| tCS(on1) | CS settling time from DIAG_EN enabled(1) | VVS = 13.5 V, VINx = 5 V, IOUTx = 0.5 A. current limit is 2 A. DIAG_EN rising edge to 90% of VCS. | 20 | µs | ||
| tCS(off2) | CS settling time from IN falling edge | VVS = 13.5 V, VDIAG_EN = 5 V, IOUTx = 0.5 A. current limit = 2 A. IN falling edge to 10% of VCS | 30 | 100 | µs | |
| tCS(on2) | CS settling time from IN rising edge | VVS = 13.5 V, VDIAG_EN = 5 V, IOUTx = 0.5 A. current limit = 2 A. IN rising edge to 90% of VCS | 50 | 150 | µs | |
| tSEx | Multi-sense transition delay from channel to channel | VDIAG_EN = 5 V, current sense output delay when multi-sense pins SEL and SEH transition from channel to channel | 50 | µs | ||
Figure 6-1 Output Delay Characteristics
Figure 6-2 CS Delay Characteristics
Figure 6-3 Open-Load Blanking-Time Characteristics
Figure 6-4 Multi-Sense Transition Delay