SLVSH18B December   2024  – July 2025 TPS4HC120-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Characteristics, SNS
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Pin Current and Voltage Conventions
      2. 7.3.2 Low Power Mode
        1. 7.3.2.1 Entry into LPM
        2. 7.3.2.2 During LPM
        3. 7.3.2.3 Exiting LPM
      3. 7.3.3 Accurate Current Sense
      4. 7.3.4 Adjustable Current Limit
      5. 7.3.5 Inductive-Load Switching-Off Clamp
      6. 7.3.6 Fault Detection and Reporting
        1. 7.3.6.1 Diagnostic Enable Function
        2. 7.3.6.2 Multiplexing of Current Sense
        3. 7.3.6.3 FAULT Reporting
        4. 7.3.6.4 Fault Table
      7. 7.3.7 Full Diagnostics
        1. 7.3.7.1 Short-to-GND and Overload Detection
        2. 7.3.7.2 Open-Load Detection
          1. 7.3.7.2.1 Channel On
          2. 7.3.7.2.2 Channel Off
        3. 7.3.7.3 Short-to-Battery Detection
        4. 7.3.7.4 Reverse-Polarity and Battery Protection
        5. 7.3.7.5 Thermal Fault Detection
          1. 7.3.7.5.1 Thermal Protection Behavior
      8. 7.3.8 Full Protections
        1. 7.3.8.1 UVLO Protection
        2. 7.3.8.2 Loss of GND Protection
        3. 7.3.8.3 Loss of Power Supply Protection
        4. 7.3.8.4 Reverse Polarity Protection
        5. 7.3.8.5 Protection for MCU I/Os
    4. 7.4 Device Functional Modes
      1. 7.4.1 Working Modes
        1. 7.4.1.1 SLEEP
        2. 7.4.1.2 DIAGNOSTIC
        3. 7.4.1.3 ACTIVE
        4. 7.4.1.4 STANDBY DELAY
        5. 7.4.1.5 LOW POWER MODE
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 EMC Transient Disturbances Test
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
        1. 8.4.2.1 Without a GND Network
        2. 8.4.2.2 With a GND Network
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.3.8.4 Reverse Polarity Protection

Method 1: Block diode connected with VBB. Both the device and load are protected when in reverse polarity. The blocking diode does not allow any of the current to flow during reverse battery condition.

TPS4HC120-Q1 Reverse Protection With Block Diode Figure 7-21 Reverse Protection With Block Diode

Method 2 (GND network protection): Only the high-side device is protected under this connection. The load reverse current is limited by the impedance of the load. When reverse polarity happens, the continuous reverse current through the power FET must not make the heat build up be greater than the absolute maximum junction temperature. Device temperature is calculated using the RON(REV) value and the RθJA specification. In the reverse-battery condition, ensure that the FET comes on to lower the power dissipation. This action is achieved through the path from EN to system ground where the positive voltage is being applied. No matter what types of connection are between the device GND and the board GND, if a GND voltage shift happens, ensure the following proper connections for the normal operation:

  • Connect the current limit programmable resistor to the device GND.
TPS4HC120-Q1 Reverse Protection With GND Network Figure 7-22 Reverse Protection With GND Network
  • Recommendation – resistor and diode in parallel: A peak negative spike sometimes occurs when the inductive load is switching off, which can damage the HSD or the diode. Therefore, TI recommends a resistor in parallel with the diode when driving an inductive load. The recommended selection are a 1kΩ resistor in parallel with an IF > 100mA diode. If multiple high-side switches are used, share the resistor and diode among devices.

    If multiple high-side power switches are used, share the resistor among devices.

  • Ground Resistor: The higher resistor value contributes to a better current limit effect when the reverse battery or negative ISO pulses.
    Equation 6. TPS4HC120-Q1

    where

    • –VCC is the maximum reverse battery voltage (typically –16V).
    • –IGND is the maximum reverse current the ground pin can withstand, which is available in the Absolute Maximum Ratings.
  • Ground Diode: A diode is needed to block the reverse voltage, which also brings a ground shift (≈600mV). Additionally, the diode must be ≈200V reverse voltage for the ISO 7637 pulse 1 testing so that the diode is not biased.