SLVSHM2B March   2025  – October 2026 TPS2HC120-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SNS Timing Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Pin Current and Voltage Conventions
      2. 7.3.2 Low Power Mode
        1. 7.3.2.1 Entry Into LPM
        2. 7.3.2.2 During LPM
        3. 7.3.2.3 Exiting LPM
      3. 7.3.3 Accurate Current Sense
      4. 7.3.4 Adjustable Current Limit
      5. 7.3.5 Inductive-Load Switching-Off Clamp
      6. 7.3.6 Fault Detection and Reporting
        1. 7.3.6.1 Diagnostic Enable Function
        2. 7.3.6.2 Multiplexing of Current Sense
        3. 7.3.6.3 FLT Reporting
        4. 7.3.6.4 Fault Table
      7. 7.3.7 Full Diagnostics
        1. 7.3.7.1 Short-to-GND and Overload Detection
        2. 7.3.7.2 Open-Load Detection
          1. 7.3.7.2.1 Channel On
          2. 7.3.7.2.2 Channel Off
        3. 7.3.7.3 Short-to-Battery Detection
        4. 7.3.7.4 Reverse-Polarity and Battery Protection
        5. 7.3.7.5 Thermal Fault Detection
          1. 7.3.7.5.1 Thermal Protection Behavior
      8. 7.3.8 Full Protections
        1. 7.3.8.1 UVLO Protection
        2. 7.3.8.2 Loss of GND Protection
        3. 7.3.8.3 Loss of Power Supply Protection
        4. 7.3.8.4 Reverse Battery Protection
        5. 7.3.8.5 Protection for MCU I/Os
    4. 7.4 Device Functional Modes
      1. 7.4.1 Working Modes
        1. 7.4.1.1 SLEEP
        2. 7.4.1.2 DIAGNOSTIC
        3. 7.4.1.3 ACTIVE
        4. 7.4.1.4 STANDBY DELAY
        5. 7.4.1.5 LOW POWER MODE
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 EMC Transient Disturbances Test
    3. 8.3 Typical Application
      1. 8.3.1 Design Requirements
      2. 8.3.2 Detailed Design Procedure
      3. 8.3.3 Application Curves
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Examples
        1. 8.5.2.1 Without a GND Network
        2. 8.5.2.2 With a GND Network
  10. 9 Device and Documentation Support
    1. 9.1 Third-Party Products Disclaimer
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

6.5 Electrical Characteristics

VBB = 6 V to 18 V, TJ = –40°C to 150°C (unless otherwise noted); Typical application is 13.5V, 1A, RILIM = Open (unless otherwise specified). Digital input pins are EN1, EN2, EN1_AUX, EN2_AUX, SEL0, DIAG_EN.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT VOLTAGE AND CURRENT
VUVLOR VBB undervoltage lockout rising Measured with respect to the GND pin of the device 3.2 3.6 4.0 V
VUVLOF VBB undervoltage lockout falling 2.5 2.75 3.0 V
VClamp VDS clamp voltage TJ = 25°C 35 43 V
TJ = –40°C to 150°C 34 45 V
VOUTClamp VOUT clamp voltage  TJ = –40°C to 150°C -31 -23 V
IQ Quiescent current all channels enabled VBB ≤ 28V, VEN = 5V, VDIAG_EN = 5V, IOUTx = 0A 2.8 4.6 mA
IQ_DIAG_DIS Quiescent current channel enabled diagnostic disabled VBB ≤ 28V, VEN = 5V, VDIAG_EN = 0V, IOUTx = 0A 3.8 4.3 mA
ISB Current consumption in standby mode VBB ≤ 18V, ISNS = 0mA, VENx = 0V, VDIAG_EN = 5V, VOUT = 0V  3.8 4.6 mA
tSTBY Delay time to remain in standby mode before entering sleep mode(1) VENx = VDIAG_EN = 5V to 0V 15 20 25 ms
ISLEEP Sleep current (total device leakage including MOSFET channels) VBB ≤ 18V, VENx = VDIAG_EN = 0V, VOUT = 0V TJ = 25°C
 		 0.5 µA
TJ = 85°C
 		 1.5 µA
TJ = 150°C
 0.7 2 µA
IOUT(standby) Output leakage current per channel in Standby(1) VBB ≤ 18V, VENx = VDIAG_EN = 0V, VOUT = 0V, VOUT to GND TJ = 25°C 6 µA
TJ = 150°C 10 µA
IOUT(sleep) Output leakage current per channel in Sleep VBB ≤ 18V, VENx = VDIAG_EN = 0V, VOUT = 0V, VOUT to GND TJ = 25°C 0.01 0.1 µA
TJ = 85°C 0.5 µA
TJ = 150°C 0.2 1 µA
ILNOM Continuous load current per channel Both channels enabled TJ = 85°C 2 A
One channel enabled 3 A
RON CHARACTERISTICS
RON On-resistance 5V < VBB ≤ 28V,   IOUT= 1 A TJ = 25°C 120 mΩ
TJ = 150°C 250
3V ≤ VBB ≤ 5V,    IOUT =1 A TJ = 25°C 175
TJ = 150°C 280
ΔRON Percentage difference in On-state resistance between channels(1) 5V < VBB ≤ 28V,   IOUT= 1A TJ = –40°C to 150°C 0.5 5 %
RON(REV) On-resistance during reverse polarity –18V ≤ VBB ≤ –6V TJ = 25°C 120 mΩ
TJ = 150°C 250 mΩ
VF Drain-to-source diode voltage VEN = 0V IOUT = –0.1A 0.8 1 V
CURRENT SENSE CHARACTERISTICS
KSNS Current sense ratio
IOUT / ISNS		 IOUT = 1A 1030
ISNSI Current sense current and accuracy(2) VEN = VDIAG_EN = 5V IOUT = 2A   1.9   mA
–4 3 %
IOUT = 1.5A   1.43   mA
–4 3 %
IOUT = 750mA   0.72   mA
–4 3 %
IOUT = 300mA 0.29   mA
–5 5 %
IOUT = 100mA   0.1   mA
–12 12 %
IOUT = 75mA 0.072 mA
–16 16 %
IOUT = 30mA 0.03 mA
–35 35 %
IOUT = 15mA 0.014 mA
–50 50 %
IOUT =10mA 0.0095 mA
-80 80 %
SNS CHARACTERISTICS
VSNSFH VSNS fault high-level VDIAG_EN = 5V RSNS= 1kΩ 4.5 4.85 5.2 V
VDIAG_EN  = 3.3V RSNS= 1kΩ 3.2 3.55 3.9 V
VDIAG_EN = VIH (1.8V) RSNS= 1kΩ 3.2 3.55 3.9 V
ISNSFH ISNS fault high-level VDIAG_EN > VIH,DIAG_EN 4.5 6 mA
ISNSleak_EN Leakage current on SNS
pin (sensing enabled)		 -11 -0.5 11 µA
ISNSleak_DIS Leakage current on SNS
pin (sensing disabled)		 -1 -0.01 1 µA
VBB_ISNS VBB headroom needed for full current sense and fault functionality(1) VDIAG_EN = 3.3V Measure with respect to GND pin of device 5 V
VDIAG_EN = 5V 6.5 V
CURRENT LIMIT CHARACTERISTICS
ICL ICL setting(3) RILIM > 87kΩ (ILIM open) 4 4.7 5.6 A
RILIM < 1.1kΩ (ILIM short to ground) 1.9 2.1 2.4
RILIM = 2.37kΩ to 2.61kΩ 1.7 1.9 2.1
RILIM = 4.64kΩ to 5.11kΩ 1.5 1.68 1.85
RILIM = 9.31kΩ to 10.5kΩ 1.3 1.44 1.6
RILIM = 15.8kΩ to 17.3kΩ 1.1 1.21 1.31
RILIM = 22.1kΩ to 24.3kΩ 0.85 1 1.1
RILIM = 29.5kΩ to 32.4kΩ 0.65 0.75 0.85
RILIM = 41.2kΩ to 45.9kΩ 0.4 0.5 0.6
RILIM = 54.9kΩ to 60.4kΩ 0.19 0.25 0.32
ICL_ENPS Peak current enabling into permanent short(1) TJ = –40°C to 150°C Load = 5µH +100mΩ 1.5 × ICL 2 × ICL 2.25 × ICL A
ICL_LINPK Linear Mode peak(1) TJ = -40°C to 150°C dI/dt < 0.01 A/ms IILIM = 0.25A to 2.1A ICL 1.12 × ICL 1.4 × ICL A
IOVCR OVCR Peak current when short is applied while switch enabled(1) TJ = -40°C to 150°C Load = 5μH +100mΩ, RILIM = Open 8 11 16.5 A
tOVCR OVCR reaction time when short is applied while switch enabled(1) TJ = -40°C to 150°C Load = 5μH +100mΩ 0.5 1 2 µs
FAULT CHARACTERISTICS
RPU Open-load (OL) detection internal resistor VEN = 0 V, VDIAG_EN = 5V 100 135 175 kΩ
tOL Open-load (OL) detection deglitch time VEN = 0V, VDIAG_EN = 5V, When VBB – VOUT < VOL,off, duration longer than tOL. Open load detected. 300 500 µs
VOL,off Open-load (OL) detection voltage VEN = 0V, VDIAG_EN = 5V 1 1.5 V
tOL1 OL and STB indication-time from EN falling VEN = 5V to 0V, VDIAG_EN = 5V
IOUT = 0mA, VOUT = VBB – VOL,off		 500 µs
tOL2 OL and STB indication-time from DIA_EN rising VEN = 0V, VDIAG_EN = 0V to 5V
IOUT = 0mA, VOUT = VBB – VOL,off		 600 µs
TABS Thermal shutdown for CHx(1) 162 177 192 °C
THYS CHx Thermal shutdown hysteresis(1) 30 °C
TREL CHx Relative thermal shutdown 80 °C
tFAULT_FLT Fault indication-time VDIAG_EN = 5V
Time between fault and FLT asserting		 60 µs
tFAULT_SNS Fault indication-time VDIAG_EN = 5V
Time between fault and ISNS settling at VSNSFH		 60 µs
tRETRY Retry time Time from fault shutdown until switch re-enable (thermal shutdown). 1 2 3 ms
LOW POWER MODE
ILPM,enter Load current level for entry to LPM t > tSTBY 83 110 137 mA
ILPM,exit Load current level for exit of LPM 130 165 200 mA
RDSON,LPM RDSON in Low Power Mode 50mA ILOAD 130 mΩ
IQLPM Quiscent current per channel in LPM with one channels enabled(1) ILOAD = 0 mA, TJ = -40℃ to 150℃ 33 60 µA
Quiscent current per channel in LPM with all channels enabled(1) ILOAD = 0 mA, TJ = -40℃ to 150℃ 20 33 µA
tLPM LPM Transistion indication-time(1) Device in LPM transistioning out
time between current increase and LPM asserting		 50 µs
tWAKE Recovery/Exit time from LPM(1) Device in LPM transistioning out
time between wake interrupt and LPM asserting		 50 µs
IPKLPM,SC Short circuit threshold for immediate shut-off during LPM mode ILIM ≤ 2.1A 1.6×ILIM
RILIM = OPEN 3.6 A
DIGITAL INPUT PIN CHARACTERISTICS
VIL, DIN Input voltage low-level No GND Network 0.8 V
VIH, DIN Input voltage high-level No GND Network 1.5 V
VIHYS, DIN Input voltage hysteresis 100 mV
RPD_DIN Internal pulldown resistor for ENx, ENx_AUX, DIAG_EN 0.7 1 1.3 MΩ
Internal pulldown resistor for SEL 0.7 1 1.3 MΩ
IIH, DIN Input current high-level for SEL VDINx = 5.5V 10 µA
Input current high-level for DIAG_EN VDIAG_EN = 5.5V 30
Input current high-level for ENx VENx = 5.5V 30
DIGITAL OUTPUT PIN CHARACTERISTICS
VLPM LPM low output voltage ILPM = 2mA 0.4 V
VFLT FLT low output voltage  IFLT = 2mA 0.4 V
(1) Parameter specified by design; not subject to production test.
(2) Current sense current accuracy specification includes error contribution from leakage current on SNS pin in sensing enabled state.
(3) Effective RILIM resistance, including tolerances, must fall within the specified RILIM resistance ranges.