A minimum input ceramic capacitor is required for stability. A minimum output ceramic capacitor is also required for stability; see the Recommended Operating Conditions table for the minimum capacitor values.

The input capacitor counteracts reactive input sources and improves transient response, input ripple, and PSRR. A higher-value input capacitor can be necessary if large, fast rise-time load or line transients are anticipated, or if the device is located several inches from the input power source.

An output capacitor of an appropriate value helps provide stability and improve dynamic performance. Use an output capacitor within the range specified in the Recommended Operating Conditions table. Minimize any inductance between OUT and the output capacitance (including any effective inductance within the capacitor) to less than the value shown in the table to avoid degrading settling performance.

Connect a 0.1μF or greater ceramic capacitor from BIAS to GND. This capacitor counteracts reactive bias source effects if the source impedance is not sufficiently low. If the BIAS source is susceptible to fast voltage drops (for example, a 2V drop in less than 1µs) when the LDO load current is near the maximum value, the BIAS voltage drop can cause the output voltage to fall briefly. In such cases, use a BIAS capacitor large enough to slow the voltage ramp rate to less than 0.5V/µs. For smaller or slower BIAS transients, any output voltage dips must be less than 5% of the nominal voltage.

Place the input, output, and bias capacitors as close as possible to the device to minimize the effects of trace parasitic impedance.