SLVSIU3 March   2026 TPS7A15C

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Excellent Transient Response
      2. 6.3.2 Active Overshoot Pulldown Circuitry
      3. 6.3.3 Global Undervoltage Lockout (UVLO)
      4. 6.3.4 Enable Input
      5. 6.3.5 Internal Foldback Current Limit
      6. 6.3.6 Active Discharge
      7. 6.3.7 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Mode
      2. 6.4.2 Dropout Mode
      3. 6.4.3 Disabled Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1  Recommended Capacitor Types
      2. 7.1.2  Input, Output, and Bias Capacitor Requirements
      3. 7.1.3  Dropout Voltage
      4. 7.1.4  Behavior During Transition From Dropout Into Regulation
      5. 7.1.5  Device Enable Sequencing Requirement
      6. 7.1.6  Load Transient Response
      7. 7.1.7  Undervoltage Lockout Circuit Operation
      8. 7.1.8  Power Dissipation (PD)
      9. 7.1.9  Estimating Junction Temperature
      10. 7.1.10 Recommended Area for Continuous Operation
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Module
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Mechanical Data

4 Pin Configuration and Functions

TPS7A15C YCK Package,6-Pin WCSP, 0.35mm Pitch(Top View)Figure 4-1 YCK Package,6-Pin WCSP, 0.35mm Pitch(Top View)
Table 4-1 Pin Functions: YCK Package
PINTYPEDESCRIPTION
NO.NAME
A1OUTOutputRegulated output pin. Connect a capacitor with effective capacitance recommended in the Recommended Operating Conditions table between OUT and GND. Place the output capacitor as close to OUT as possible.
A2INInputInput pin. For best results, use a capacitor of value at least equal to that of the output capacitor. Place the input capacitor as close to input of the device as possible.
B1SENSEInputSENSE input. This pin is a feedback input to the regulator for SENSE connections. Connecting SENSE to the load helps eliminate voltage errors resulting from trace resistance between OUT and the load.
B2ENInputEnable pin. Driving this pin to logic high enables the low-dropout regulator (LDO). Driving this pin to logic low disables the LDO. If enable functionality is not required, this pin must be connected to IN or BIAS.
C1GND—Ground pin. This pin must be connected to ground.
C2BIASInputBIAS pin. This pin enables the use of low-input voltage, low-output voltage (LILO) conditions. For best performance, use a 0.1µF or larger ceramic capacitor from BIAS to GND. Place the bias capacitor as close to BIAS as possible.