SLVSJ01 June   2025 TXG8122-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions—TXG8122-Q1
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Electrical Characteristics
    5. 5.5  Supply Current Characteristics
    6. 5.6  Switching Characteristics, VCCA = 3.3 ± 0.3V
    7. 5.7  Switching Characteristics, VCCA = 5 ± 0.5V
    8. 5.8  Electrical Characteristics (85°C)
    9. 5.9  Supply Current Characteristics (85°C)
    10. 5.10 Switching Characteristics, VCCA = 3.3 ± 0.3V (85°C)
    11. 5.11 Switching Characteristics, VCCA = 5 ± 0.5V (85°C)
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Bidirectional Level Translation
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Regulatory Requirements
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.8 Electrical Characteristics (85°C)

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS Operating free-air temperature (TA) UNIT
–40°C to 85°C
MIN TYP MAX
VILT1 Voltage input threshold low
(SDA1 and SCL1)		 481 606 mV
VIHT1 Voltage input threshold high
(SDA1 and SCL1)		 528 663 mV
VHYST1 Voltage input hystersis VIHT1 - VILT1 43 61 mV
VOL1 Low-level output voltage 
(SDA1 and SCL1)		 0.5 mA ≤ (ISDA1 and ISCL1) ≤ 3.5 mA 768 mV
ΔVOIT1 Low-level output voltage to high-level input voltage threshold difference, SDA1 and SCL1 0.5 mA ≤ (ISDA1 and ISCL1) ≤ 3.5 mA 51 mV
VILT2 Voltage input threshold low
(SDA2 and SCL2)		 0.34 x VCC2 0.35 x VCC2 V
VIHT2 Voltage input threshold high
(SDA2 and SCL2)		 0.47 x VCC2 0.48 x VCC2 V
VHYST2 Voltage input hystersis VIHT2 - VILT2 0.13 x VCC2 V
VOL2 Low-level output voltage  0.5 mA ≤ (ISDA1 and ISCL1) ≤ 30 mA 0.49 V
II (Side 1) Input leakage current
(SDA1, SCL1)		 VSDA1, VSCL1 = VCC1 = 5.5V TBD µA
II (Side 2) Input leakage current
(SDA2, SCL2)		 VSDA2, VSCL2 = VCC2 = 5.5V µA
Ci Input capacitance to local ground VI = 0.4 × sin (2E6*πt) + VDDx / 2 6 pF
CGND Cap between grounds All channels combined (VCC both sides are powered on) 44 pF
All channels combined (VCC to GND shorted) 51 pF
Leakage Current Leakage between GndA to GndB All channels combined (VCC to GND shorted) 0.37 µA
All channels combined (VCC both sides are powered on and inputs are all high) 0.37 µA
All channels combined (VCC both sides are powered on and inputs are all low) 43 µA
CMTI Common Mode Transient Immunity  Input static 
Ground shift up to 80V		 0.5 kV/µs
VUVLO+ Positive-Going Undervoltage Lockout Voltage Side 1 2.9 V
Side 2 2.25 V
VUVLO- Negative-Going Undervoltage Lockout Voltage Side 1 2.3 V
Side 2 1.7 V
VUVLO_Hys Undervoltage Lockout Hysteresis Side 1 87 mV
Side 2 156 mV