SLVSNG3 August   2026 DRV8374-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings AUTO
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 SPI Timing Requirements
    7. 7.7 SPI Timings
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Output Stage
      2. 8.3.2  Control Modes
        1. 8.3.2.1 3x PWM Mode (PWM_MODE = 10b or 11b or MODE_SR Pin is Connected to GVDD with RMODE or to GVDD)
      3. 8.3.3  Device Interface Modes
        1. 8.3.3.1 Serial Peripheral Interface (SPI)
        2. 8.3.3.2 Hardware Interface
      4. 8.3.4  GVDD Linear Voltage Regulator
      5. 8.3.5  Charge Pump
      6. 8.3.6  Slew Rate Control
      7. 8.3.7  Cross Conduction (Dead Time)
      8. 8.3.8  Propagation Delay
      9. 8.3.9  Pin Diagrams
        1. 8.3.9.1 Logic Level Input Pin (Internal Pulldown)
        2. 8.3.9.2 Logic Level Input Pin (Internal Pullup)
        3. 8.3.9.3 Open Drain Pin
        4. 8.3.9.4 Push Pull Pin
        5. 8.3.9.5 Four Level Input Pin
      10. 8.3.10 Current Sense Amplifiers
        1. 8.3.10.1 Current Sense Amplifier Operation (23-pin variant)
        2. 8.3.10.2 Current Sense Amplifier Operation (29-pin variant)
      11. 8.3.11 Active Demagnetization
        1. 8.3.11.1 Automatic Synchronous Rectification Mode (ASR Mode)
          1. 8.3.11.1.1 Automatic Synchronous Rectification in Commutation
          2. 8.3.11.1.2 Automatic Synchronous Rectification in PWM Mode
        2. 8.3.11.2 Automatic Asynchronous Rectification Mode (AAR Mode)
      12. 8.3.12 Cycle-by-Cycle Current Limit
        1. 8.3.12.1 Cycle by Cycle Current Limit with 100% Duty Cycle Input
      13. 8.3.13 Protections
        1. 8.3.13.1 VM Supply Undervoltage Lockout (RESET)
        2. 8.3.13.2 GVDD Undervoltage Lockout (GVDD_UV)
        3. 8.3.13.3 VCP Charge Pump Undervoltage Lockout (CPUV)
        4. 8.3.13.4 Over Voltage Protections (OV)
        5. 8.3.13.5 Overcurrent Protection (OCP)
          1. 8.3.13.5.1 OCP Latched Shutdown (OCP_MODE = 00b)
          2. 8.3.13.5.2 OCP Automatic Retry (OCP_MODE = 01b)
          3. 8.3.13.5.3 OCP Report Only (OCP_MODE = 10b)
          4. 8.3.13.5.4 OCP Disabled (OCP_MODE = 11b)
        6. 8.3.13.6 Thermal Warning (OTW)
        7. 8.3.13.7 Thermal Shutdown (OTS)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Functional Modes
        1. 8.4.1.1 Sleep Mode
        2. 8.4.1.2 Operating Mode
        3. 8.4.1.3 Fault Reset (CLR_FLT or nSLEEP Reset Pulse)
      2. 8.4.2 DRVOFF functionality
    5. 8.5 SPI Communication
      1. 8.5.1 Programming
        1. 8.5.1.1 SPI Format
  10. 9 Register Map
    1. 9.1 CONTROL Registers
    2. 9.2 STATUS Registers
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Power Supply Recommendations
      1. 10.2.1 Bulk Capacitance
    3. 10.3 Layout
      1. 10.3.1 Layout Guidelines
      2. 10.3.2 Layout Example
      3. 10.3.3 Thermal Considerations
        1. 10.3.3.1 Power Dissipation
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

10.2.1 Bulk Capacitance

Having an appropriate local bulk capacitance is an important factor in motor drive system design. Having more bulk capacitance is generally more beneficial, while the disadvantages are increased cost and physical size.

The amount of local capacitance needed depends on a variety of factors, including:

  • The highest current required by the motor system
  • The capacitance and current capability of the power supply
  • The amount of parasitic inductance between the power supply and motor system
  • The acceptable voltage ripple
  • The type of motor used (brushed dc, brushless DC, stepper)
  • The motor braking method

The inductance between the power supply and the motor drive system limits the rate current can change from the power supply. If the local bulk capacitance is too small, the system responds to excessive current demands or dumps from the motor with a change in voltage. When adequate bulk capacitance is used, the motor voltage remains stable and high current can be quickly supplied.

The data sheet generally provides a recommended value, but system-level testing is required to determine the appropriate sized bulk capacitor.

DRV8374-Q1 Example Setup of Motor Drive System With External Power SupplyFigure 10-3 Example Setup of Motor Drive System With External Power Supply

The voltage rating for bulk capacitors must be higher than the operating voltage, to provide margin for cases when the motor transfers energy to the supply.