SLVSNS8 September   2026 TMUXS1306A

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information: TMUXS1306A
    5. 6.5  Thermal Information: TMUXS1307A
    6. 6.6  Electrical Characteristics
    7. 6.7  Logic and Dynamic Characteristics
    8. 6.8  Timing Characteristics
    9. 6.9  Injection Current Coupling
    10. 6.10 SPI Timing Characteristics (5.5V)
    11. 6.11 SPI Timing Characteristics (3.3V)
    12. 6.12 SPI Timing Characteristics (2.7V)
    13. 6.13 SPI Timing Characteristics (1.8V)
  8. 7 Parameter Measurement Information
    1. 7.1  On-Resistance
    2. 7.2  Off-Leakage Current
    3. 7.3  On-Leakage Current
    4. 7.4  Transition Time
    5. 7.5  Break-Before-Make
    6. 7.6  tON(EN) and tOFF(EN)
    7. 7.7  Charge Injection
    8. 7.8  Off Isolation
    9. 7.9  Crosstalk
    10. 7.10 Bandwidth
    11. 7.11 Injection Current Control
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bidirectional Operation
      2. 8.3.2 Rail-to-Rail Operation
      3. 8.3.3 1.8V Logic Compatible Inputs
      4. 8.3.4 Fail-Safe Logic
      5. 8.3.5 Injection Current Control
    4. 8.4 Device Functional Modes
      1. 8.4.1 SPI Operation
        1. 8.4.1.1 Auto Cycle Mode
        2. 8.4.1.2 Address Mode
        3. 8.4.1.3 Burst Mode
        4. 8.4.1.4 Daisy Chain Mode
        5. 8.4.1.5 Software Reset
  10. 9  TMUXS1306A Register Map
  11. 10 TMUXS1307A Register Map
  12. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
    3. 11.3 Power Supply Recommendations
    4. 11.4 Layout
      1. 11.4.1 Layout Guidelines
      2. 11.4.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information
    1. 14.1 Tape and Reel Information
    2. 14.2 Mechanical Data

5 Pin Configuration and Functions

TMUXS1306A TMUXS1307A TMUXS1306A: RGE Package, 24-Pin VQFN (Top View)Figure 5-1 TMUXS1306A: RGE Package, 24-Pin VQFN (Top View)
TMUXS1306A TMUXS1307A TMUXS1306A: PW and DGS 24-Pin TSSOP and VSSOP (Top View)Figure 5-2 TMUXS1306A: PW and DGS 24-Pin TSSOP and VSSOP (Top View)
Table 5-1 Pin Functions: TMUXS1306A
PIN TYPE(1) DESCRIPTION
NAME RGE NO. PW, DGS NO.
S10 1 21 I/O Source pin 10. Can be an input or output.
S9 2 22 I/O Source pin 9. Can be an input or output.
S8 3 23 I/O Source pin 8. Can be an input or output.
S7 4 2 I/O Source pin 7. Can be an input or output.
S6 5 3 I/O Source pin 6. Can be an input or output.
S5 6 4 I/O Source pin 5. Can be an input or output.
S4 7 5 I/O Source pin 4. Can be an input or output.
S3 8 6 I/O Source pin 3. Can be an input or output.
S2 9 7 I/O Source pin 2. Can be an input or output.
S1 10 8 I/O Source pin 1. Can be an input or output.
S0 11 9 I/O Source pin 0. Can be an input or output.
GND 12 12 P Ground (0V) reference.
D 13 1 I/O Drain pin (Common) of mux A. Can be an input or output.
CS 14 10 I SPI chip select pin (active low)
SCLK 15 11 I SPI clock input
SDI 16 13 I SPI serial data input. Data is captured on the positive edge of SCLK
SDO 17 14 O SPI serial data output
AC 18 15 I Toggle channel pin. Default toggles on active edge.
VDD 19 24 P Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1µF to 10µF between VDD and GND.
S15 20 16 I/O Source pin 15. Can be an input or output.
S14 21 17 I/O Source pin 14. Can be an input or output.
S13 22 18 I/O Source pin 13. Can be an input or output.
S12 23 19 I/O Source pin 12. Can be an input or output.
S11 24 20 I/O Source pin 11. Can be an input or output.
Thermal pad N/A FOR PW/DGS P Exposed thermal pad with conductive die attached. Must be tied to GND. Ground (0V) reference.
(1) I = input, O = output, I/O = input and output, P = power.
TMUXS1306A TMUXS1307A TMUXS1307A: RGE Package, 24-Pin VQFN (Top View)Figure 5-3 TMUXS1307A: RGE Package, 24-Pin VQFN (Top View)
Table 5-2 Pin Functions: TMUXS1307A
PIN TYPE(1) DESCRIPTION
NAME NO.
S2B 1 I/O Source pin 2 of mux B. Can be an input or output.
S1B 2 I/O Source pin 1 of mux B. Can be an input or output.
S0B 3 I/O Source pin 0 of mux B. Can be an input or output.
S7A 4 I/O Source pin 7 of mux A. Can be an input or output.
S6A 5 I/O Source pin 6 of mux A. Can be an input or output.
S5A 6 I Source pin 5 of mux A. Can be an input or output.
S4A 7 I/O Source pin 4 of mux A. Can be an input or output.
S3A 8 I/O Source pin 3 of mux A. Can be an input or output.
S2A 9 I/O Source pin 2 of mux A. Can be an input or output.
S1A 10 I/O Source pin 1 of mux A. Can be an input or output.
S0A 11 I/O Source pin 0 of mux A. Can be an input or output.
DA 12 I/O Drain pin (Common) of mux A. Can be an input or output.
AC 13 I Toggle channel pin. Default toggles on active edge.
CS 14 I SPI chip select pin (active low)
SCLK 15 I SPI clock input
SDI 16 I SPI serial data input. Data is captured on the positive edge of SCLK
SDO 17 O SPI serial data output
DB 18 I/O Drain pin (Common) of mux B. Can be an input or output.
VDD 19 P Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1µF to 10µF between VDD and GND.
S7B 20 I/O Source pin 7 of mux B. Can be an input or output.
S6B 21 I/O Source pin 6 of mux B. Can be an input or output.
S5B 22 I/O Source pin 5 of mux B. Can be an input or output.
S4B 23 I/O Source pin 4 of mux B. Can be an input or output.
S3B 24 I/O Source pin 3 of mux B. Can be an input or output.
Thermal pad P Exposed thermal pad with conductive die attached. Must be tied to GND. Ground (0V) reference.
(1) I = input, O = output, I/O = input and output, P = power.