SLVSNS8 September   2026 TMUXS1306A

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information: TMUXS1306A
    5. 6.5  Thermal Information: TMUXS1307A
    6. 6.6  Electrical Characteristics
    7. 6.7  Logic and Dynamic Characteristics
    8. 6.8  Timing Characteristics
    9. 6.9  Injection Current Coupling
    10. 6.10 SPI Timing Characteristics (5.5V)
    11. 6.11 SPI Timing Characteristics (3.3V)
    12. 6.12 SPI Timing Characteristics (2.7V)
    13. 6.13 SPI Timing Characteristics (1.8V)
  8. 7 Parameter Measurement Information
    1. 7.1  On-Resistance
    2. 7.2  Off-Leakage Current
    3. 7.3  On-Leakage Current
    4. 7.4  Transition Time
    5. 7.5  Break-Before-Make
    6. 7.6  tON(EN) and tOFF(EN)
    7. 7.7  Charge Injection
    8. 7.8  Off Isolation
    9. 7.9  Crosstalk
    10. 7.10 Bandwidth
    11. 7.11 Injection Current Control
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bidirectional Operation
      2. 8.3.2 Rail-to-Rail Operation
      3. 8.3.3 1.8V Logic Compatible Inputs
      4. 8.3.4 Fail-Safe Logic
      5. 8.3.5 Injection Current Control
    4. 8.4 Device Functional Modes
      1. 8.4.1 SPI Operation
        1. 8.4.1.1 Auto Cycle Mode
        2. 8.4.1.2 Address Mode
        3. 8.4.1.3 Burst Mode
        4. 8.4.1.4 Daisy Chain Mode
        5. 8.4.1.5 Software Reset
  10. 9  TMUXS1306A Register Map
  11. 10 TMUXS1307A Register Map
  12. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
    3. 11.3 Power Supply Recommendations
    4. 11.4 Layout
      1. 11.4.1 Layout Guidelines
      2. 11.4.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information
    1. 14.1 Tape and Reel Information
    2. 14.2 Mechanical Data

3 Description

The TMUXS1306A and TMUXS1307A are general purpose complementary metal-oxide semiconductor (CMOS) multiplexers (MUX). The TMUXS1306A is an 16:1, 1-channel (single-ended) mux, while the TMUXS1307A is a 8:1, 2-channel (differential) mux. The devices support bidirectional analog and digital signals on the source (Sx) and drain (Dx) pins ranging from GND to VDD.

The TMUXS130xA devices have an internal injection current control feature, which eliminates the need for external diode and resistor networks typically used to protect the switch and keep the input signals within the supply voltage. The internal injection current control circuitry allows signals on disabled or enabled signal paths to exceed the supply voltage. Disabled channels with voltages above VDD are prevented from affecting the signal of the enabled signal path. Additionally, the TMUXS130xA devices do not have an internal diode path to the supply pin, which eliminates the risk of damaging components connected to the supply pin or providing unintended power to the supply rail.

The switches of TMUXS130xA are controlled with a serial peripheral interface (SPI). The SPI has many error detection features, such as CRC, invalid read/write, and clock count error detection. The SPI also supports auto cycle (AC) mode (control MUX with a single GPIO), daisy chain mode, and burst mode.

Device Information
PART NUMBER CONFIGURATION(1) PACKAGE(2) PACKAGE SIZE(3)
TMUXS1306A Channel 16:1 PW (TSSOP, 24)(4) 7.8mm × 6.4mm
DGS (VSSOP, 24)(4) 6.1mm × 4.9mm
RGE (VQFN, 24) 4mm × 4mm
TMUXS1307A 2 Channel 8:1 RGE (VQFN, 24) 4mm × 4mm
(2) For more information, see Section 14.
(3) The package size (length × width) is a nominal value and includes pins, where applicable.
(4) Preview information (not Advance Information).
TMUXS1306A TMUXS1307A TMUXS1306A and TMUXS1307A Block Diagram TMUXS1306A and TMUXS1307A Block Diagram