SLVUDF7 October   2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Electrostatic Discharge Caution
    3. 1.3 Kit Contents
    4. 1.4 Specification
    5. 1.5 Device Information
    6. 1.6 Hot Surface Warning
  8. 2Hardware
    1. 2.1 Setup and Connections
    2. 2.2 Jumper Settings
    3. 2.3 Power-Supply Connections
    4. 2.4 Analog Input and Output Connections
    5. 2.5 Reference Input
    6. 2.6 Digital Input Pins and Gain Control
    7. 2.7 Modifications
  9. 3Hardware Design Files
    1. 3.1 PCB Layout
    2. 3.2 Schematic
    3. 3.3 Bill of Materials
  10. 4Additional Information
    1. 4.1 Trademarks
  11. 5Related Documentation

2.7 Modifications

For flexibility, the EVM provides optional capacitors C4 and C14. These capacitors are in parallel with the PGA848 output-stage difference amplifier internal resistors (6.67kΩ) to implement noise filtering. To implement noise filtering, establish a frequency of interest (foi) in the application and calculate the feedback capacitor. In an example where the foi is 1kHz, the capacitor populated on C4 and C14 is 2.2nF (C0G NP0) capacitor.

Equation 2. C4 and C14=12π×6.67kΩ×10×foi=12π×6.67 kΩ×10×1 kHz=2.39nF ≈2.2nF

In addition, the evaluation board provides footprints R6, R11, C9, C5, and C11 for optional input low-pass filters, and footprints for load resistor R7.

The common-mode capacitors (C5 and C11) must be equal to another, and the input series resistors (R6 and R11) must be equal to one another. The differential capacitor (C9) must be ten times larger than the common-mode capacitors.

Equation 3. fCM=12π×RIN×CCM=12π×R6×C5
Equation 4. fDiff=12π×2RIN×(CDIFF+CCM2)=14π×R6×(C9+C52)

These additional component footprints in the layout allow the user to customize the evaluation circuit. For a full schematic of the PGA848EVM, see Figure 3-6.