SLVUDL1A November   2025  – December 2025

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
    5. 1.5 General Texas Instruments High Voltage Evaluation (TI HV EVM) User Safety Guidelines
  7. 2Hardware
    1. 2.1 Test Points
      1. 2.1.1 Key Connections
        1. 2.1.1.1 Connect a Supply to J3 Connector
        2. 2.1.1.2 PWM Input
          1. 2.1.1.2.1 IIM Mode using on board dead time generation circuit (Single PWM Input)-Default Mode
          2. 2.1.1.2.2 IIM Mode using two separate PWM inputs (Dual PWM Input)
          3. 2.1.1.2.3 PWM Input Mode (Single PWM Input)
        3. 2.1.1.3 Resistor controls
          1. 2.1.1.3.1 Slew-rate control resistors
          2. 2.1.1.3.2 Dead-time control resistors
        4. 2.1.1.4 Power Supply
    2. 2.2 Power-Up Procedure
      1. 2.2.1 Step 1: Driver Bias Supply
      2. 2.2.2 Step 2: Input Supply
      3. 2.2.3 Step 3: Measure SW Voltage
      4. 2.2.4 Setting Dead-Time
    3. 2.3 Power- Down Procedure
    4. 2.4 Zero Voltage Detection (ZVD) Reporting
    5. 2.5 Ideal Diode Mode
    6. 2.6 Fault Detection
    7. 2.7 Assembly Guidelines
  8. 3Implementation Results
    1. 3.1 Electrical Performance Specifications
      1. 3.1.1 Evaluation Setup
    2. 3.2 Performance Data and Results
      1. 3.2.1 Efficiency results
  9. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials (BOM)
  10. 5Additional Information
    1.     Trademarks
  11. 6Revision History

2.1.1 Key Connections

The following test procedure is recommended primarily for powering up and shutting down the evaluation module. Never leave a powered EVM unattended for any length of time. Also, the unit must never be handled while power is applied.

WARNING

There are high voltages present on the EVM. Some components reach temperatures above 50°C. Precautions must be taken when handling the board.