SLVUDY9 September 2026
Table 3-4 explains required details to use the AWG page of the EVM GUI parameters from SCLK to duty cycles.
| PARAMETER | DEFAULT PARAMETER | PARAMETER OPTION | DESCRIPTION |
|---|---|---|---|
| SCLK | 65MHz | 3MHz to 66MHz |
Sets the serial clock frequency used for DAC communication. The serial clock frequency must be configured before waveform generation. |
| Reference voltage | 5V | 5V,10V,15V, 20V |
Selects reference voltage by using appropriate jumper(SH-J) through gain amplifier U2 |
| Update rate | 7.22MHz | 100kHz to 33MHz |
Selecting appropriate SCLK and SPI configuration helps to generate required update rate. |
| Device mode of operation | High precision | High precision, high speed |
High precision: 18-bit DAC resolution is selected. High speed: 16-bit DAC resolution is selected. |
| Device configuration mode | AWG mode | AWG mode, fast settling, multiplying mode | DAC channel is configured in the selected mode. |
| SPI configuration | QSPI_DDR | CSPI_SDR, CSPI_DDR, DSPI_SDR, DSPI_DDR, QSPI_SDR, QSPI_DDR, QSPI_DDR_STREAM | DAC is configured in selected SPI mode. |
| Waveform type | Sinusoidal wave | Sinusoidal wave, rectangular wave and square wave | Select the type of waveform. Default waveform type is sinusoidal waveform. |
| Frequency | 2kHz | 100Hz to 1MHz | Any output frequency within the appropriate range can be generated. |
| Minimum amplitude | –5V | –20V to –0.1V | Based on the reference voltage(see the Table 3-4), any negative reference voltage can be selected digitally. |
| Maximum amplitude | 5V | 0.1V to 20V | Based on the reference voltage (see the Table 3-4), any positive reference voltage can be selected digitally. |
| Duty cycle | 50% | 0% - 100% | Controls waveform symmetry for square and triangular waveforms. Duty cycle is not applicable for sinusoidal waveform type. |