SLVUDZ3 July   2026

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6. 16
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
      1. 1.3.1 Supported Wolfspeed Modules and Evaluation Platforms
      2. 1.3.2 Supported Gate Drivers
    4. 1.4 Device Information
      1. 1.4.1 Primary-Side Power
      2. 1.4.2 Primary-Side I/O and Diagnostics
      3. 1.4.3 Secondary-Side Bias Supply
      4. 1.4.4 Output Stage Gate Loop
      5. 1.4.5 Short-Circuit Detection System
        1. 1.4.5.1 Short-Circuit Detection - DESAT
      6. 1.4.6 PCB Pinout
    5. 1.5 General TI High Voltage Evaluation User Safety Guidelines
  8. 2Using the EVM
    1. 2.1 Equipment List and Board Setup
    2. 2.2 Test Setups and Procedures
      1. 2.2.1 Power-On and Bias Supply Check
      2. 2.2.2 Output Switching
  9. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  10. 4Additional Information
    1. 4.1 Trademarks
  11. 5References

PCB Pinout

Table 1-4 PCB Pinout [HS]
PINOUTLOCATION (TOP/BOTTOM)FUNCTION
J1TopHS DESAT drain connection
J2TopLS DESAT drain connection
VHK_12Top, whiteBoard 12V Input for both HS and LS
VINTopBias input voltage for both HS and LS (12V)
J3BottomHS gate/source connection
J4BottomLS gate/source connection
J5Top16-pin connector to connect differential signals to the EVM
J6TopLS_Bias Enable
J7TopHS_Bias Enable
J8TopGATE2_HS connector to GATE_HS
J9TopGATE2_LS connector to GATE_LS
J10TopCOM
J11TopCOM
GATE1TopMMCX connector, HS gate 1
GATE2TopMMCX connector, LS gate 1
GATE3TopMMCX connector, HS gate 2
GATE4TopMMCX connector, LS gate 2
INP_IN[HS]Top, greenHS PWM input
INP_IN[LS]Top, greenLS PWM input
INN_IN[HS]Top, blueNon - inverting gate driver control input
INN_IN[LS]Top, blueInverting gate driver control input
RDY[HS]Top, orangeHS RDY
RDY[LS]Top, orangeLS RDY
FLT[LS]Top, redLS nFLT
FLT[HS]Top, redHS nFLT
OUT_FB[HS]Top, grayHS output feedback
OUT_FB[LS]Top, grayLS output feedback
VDD[HS]Top, redHS VDD Voltage
VEE[HS]Top, redHS VEE Voltage
COM_HS, COM_HS_BIASTop, blackHS Side COM
VDD[LS]Top, redLS VDD Voltage
VEE[LS]Top, redLS VEE Voltage
COM_LS, COM_LS_BIASTop, blackLS Side COM
RESET_INTop, whiteHS and LS combined nRST
S1TopSwitch to reset HS/LS gate driver/bias
GND, GND_HKTopPrimary side GND