SLVUDZ3 July 2026
| PINOUT | LOCATION (TOP/BOTTOM) | FUNCTION |
|---|---|---|
| J1 | Top | HS DESAT drain connection |
| J2 | Top | LS DESAT drain connection |
| VHK_12 | Top, white | Board 12V Input for both HS and LS |
| VIN | Top | Bias input voltage for both HS and LS (12V) |
| J3 | Bottom | HS gate/source connection |
| J4 | Bottom | LS gate/source connection |
| J5 | Top | 16-pin connector to connect differential signals to the EVM |
| J6 | Top | LS_Bias Enable |
| J7 | Top | HS_Bias Enable |
| J8 | Top | GATE2_HS connector to GATE_HS |
| J9 | Top | GATE2_LS connector to GATE_LS |
| J10 | Top | COM |
| J11 | Top | COM |
| GATE1 | Top | MMCX connector, HS gate 1 |
| GATE2 | Top | MMCX connector, LS gate 1 |
| GATE3 | Top | MMCX connector, HS gate 2 |
| GATE4 | Top | MMCX connector, LS gate 2 |
| INP_IN[HS] | Top, green | HS PWM input |
| INP_IN[LS] | Top, green | LS PWM input |
| INN_IN[HS] | Top, blue | Non - inverting gate driver control input |
| INN_IN[LS] | Top, blue | Inverting gate driver control input |
| RDY[HS] | Top, orange | HS RDY |
| RDY[LS] | Top, orange | LS RDY |
| FLT[LS] | Top, red | LS nFLT |
| FLT[HS] | Top, red | HS nFLT |
| OUT_FB[HS] | Top, gray | HS output feedback |
| OUT_FB[LS] | Top, gray | LS output feedback |
| VDD[HS] | Top, red | HS VDD Voltage |
| VEE[HS] | Top, red | HS VEE Voltage |
| COM_HS, COM_HS_BIAS | Top, black | HS Side COM |
| VDD[LS] | Top, red | LS VDD Voltage |
| VEE[LS] | Top, red | LS VEE Voltage |
| COM_LS, COM_LS_BIAS | Top, black | LS Side COM |
| RESET_IN | Top, white | HS and LS combined nRST |
| S1 | Top | Switch to reset HS/LS gate driver/bias |
| GND, GND_HK | Top | Primary side GND |