SNAU283 October   2022

 

  1.   Abstract
  2.   Trademarks
  3. 1Evaluation Board Kit Contents
  4. 2Quick Start
    1. 2.1 Quick Start Description
      1. 2.1.1 Clock Outputs Page Description
      2. 2.1.2 TICS Pro Tips
  5. 3PLL Loop Filters and Loop Parameters
    1. 3.1 PLL1 Loop Filter
    2. 3.2 PLL2 Loop Filter
  6. 4Default TICS Pro Mode
  7. 5Using TICS Pro to Program the LMK04368-EP
    1. 5.1 Start TICS Pro Application
    2. 5.2 Select Device
    3. 5.3 Program the Device
    4. 5.4 Restoring a Default Mode
    5. 5.5 Visual Confirmation of Frequency Lock
    6. 5.6 Enable Clock Outputs
  8. 6Evaluation Board Inputs and Outputs
  9. 7Recommended Test Equipment
  10. 8Schematics
  11. 9Bill of Materials
  12.   A USB2ANY Firmware Upgrade
  13.   B TICS Pro Usage
    1. 11.1  Communication Setup
    2. 11.2  User Controls
    3. 11.3  Raw Registers Page
    4. 11.4  Set Modes Page
    5. 11.5  Holdover Page
    6. 11.6  CLKinX Control Page
    7. 11.7  PLL1 and 2 Page
    8. 11.8  SYNC / SYSREF Page
    9. 11.9  Clock Outputs Page
    10. 11.10 Other Page
    11. 11.11 Burst Mode Page

3.2 PLL2 Loop Filter

Table 3-2 Integrated VCO PLL
PARAMETER(1) LMK04368-EP UNIT

VCO0

VCO1
LF2_C1 (C12) 0.047 nF
LF2_C2 (C10) 3.9 nF
C3 (internal) 0.03 nF
C4 (internal) 0.01 nF
LF2_R2 (R41) 0.62 kΩ
R3 (internal) 0.2 kΩ
R4 (internal) 0.2 kΩ
Charge Pump Current, Kφ 3.2 mA
Phase Detector Frequency 122.88 MHz
Frequency 2457.6 2949.12 MHz
Kvco 13.0 25.0 MHz/V
N 20 24
Phase Margin 68 71 degrees
Loop Bandwidth 210 326 kHz
(1) PLL Loop Bandwidth is a function of Kφ, Kvco, N as well as loop components. Changing Kφ and N will change the loop bandwidth.