SNLS315I April   2010  – June 2026 LMH0387

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Control Pin Electrical Characteristics
    6. 5.6  Input Mode (Equalizer) DC Electrical Characteristics
    7. 5.7  Output Mode (Cable Driver) DC Electrical Characteristics
    8. 5.8  Input Mode (Equalizer) AC Electrical Characteristics
    9. 5.9  Output Mode (Cable Driver) AC Electrical Characteristics
    10. 5.10 Input Mode (Equalizer) SPI Interface AC Electrical Characteristics
    11. 5.11 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Mode (Equalizer) Description
        1. 6.3.1.1 Input Interfacing
        2. 6.3.1.2 Output Interfacing
        3. 6.3.1.3 Carrier Detect (CD)
        4. 6.3.1.4 Carrier Detect Threshold (CDTHRESH)
        5. 6.3.1.5 Auto Sleep
      2. 6.3.2 Output Mode (Cable Driver) Description
        1. 6.3.2.1 Input Interfacing
        2. 6.3.2.2 Output Interfacing
        3. 6.3.2.3 Output Slew Rate Control
        4. 6.3.2.4 Output Enable
    4. 6.4 Device Functional Modes
    5. 6.5 Programming
      1. 6.5.1 Output Mode (Cable Driver)
      2. 6.5.2 Input Mode (Equalizer)
      3. 6.5.3 Input Mode (Equalizer) SPI Register Access
        1. 6.5.3.1 SPI Write
        2. 6.5.3.2 SPI Read
        3. 6.5.3.3 Output Driver Adjustments (Register 01h)
          1. 6.5.3.3.1 Output Swing
          2. 6.5.3.3.2 Offset Voltage
        4. 6.5.3.4 Launch Amplitude Optimization (Register 02h)
          1. 6.5.3.4.1 Coarse Control
          2. 6.5.3.4.2 Fine Control
        5. 6.5.3.5 Cable Length Indicator (CLI) (Register 03h)
      4. 6.5.4 Input Mode (Equalizer) SPI Register Access
        1. 6.5.4.1 General Control (Register 00h)
          1. 6.5.4.1.1 Carrier Detect
          2. 6.5.4.1.2 Mute
          3. 6.5.4.1.3 Sleep Mode
          4. 6.5.4.1.4 Extended 3G Reach Mode
  8. 7 Register Maps
    1. 7.1 SPI Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 General Guidance for Applications
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.1 SPI Registers

Table 7-1 SPI Register Descriptions
ADDRESS R/W NAME BITS FIELD DEFAULT DESCRIPTION
00h R/W General Control 7 Carrier Detect Read only.
0: No carrier detected on BNC_IO pin.
1: Carrier detected on BNC_IO pin.
6 Mute 0 0: Normal operation.
1: Equalizer outputs muted.
5 Reserved 0 Reserved as 0. Always write 0 to this bit.
4:3 Sleep Mode 01 Equalizer sleep mode control. Sleep has precedence over Mute.
00: Never sleep. Disable sleep mode (force equalizer to stay enabled).
01: Auto sleep. Sleep mode active when no input signal detected.
10: Force sleep. Force equalizer into sleep mode (powered down) regardless of whether there is an input signal or not.
11: Reserved.
2 Extended 3G Reach Mode 0 Extended 3G reach mode to extend the equalizable cable length for 2.97Gbps applications.
0: Normal operation.
1: Extended 3G reach mode.
1:0 Reserved 00 Reserved as 00. Always write 00 to these bits.
01h R/W Output Driver 7:5 Output Swing 011 Equalizer output driver swing (VSSP-P).
000: VSSP-P = 400mVP-P.
001: VSSP-P = 500mVP-P.
010: VSSP-P = 600mVP-P.
011: VSSP-P = 700mVP-P.
100: VSSP-P = 800mVP-P.
101, 110, 111: Reserved.
4:2 Offset Voltage 001 Equalizer output driver offset voltage (common mode voltage).
000: VOS = 1.05V.
001: VOS = 1.25V.
010: VOS = 1.45V.
011: VOS = 1.65V.
100: VOS = 1.85V.
101: VOS referenced to positive supply.
110, 111: Reserved.
1:0 Reserved 00 Reserved as 00. Always write 00 to these bits.
02h R/W Launch Amplitude 7 Coarse Control 0 Coarse launch amplitude optimization for equalizer input.
0: Normal optimization with no external attenuation (800mVP-P launch amplitude).
1: Optimized for -6dB external attenuation (400mVP-P launch amplitude).
6:3 Fine Control 0000 Launch amplitude optimization fine tuning for equalizer input.
0000: +20% from nominal.
0001: +16% from nominal.
0010: +12% from nominal.
0011: +9% from nominal.
0100: +6% from nominal.
0101: +3% from nominal.
0110: Nominal. (The default setting must be changed to this nominal setting for most applications).
0111: -2% from nominal.
1001: +24% from nominal.
1010: +29% from nominal.
1011: +34% from nominal.
1100: +40% from nominal.
1101: +46% from nominal.
1110: +53% from nominal.
1111: +60% from nominal.
1000: Reserved.
2:0 Reserved 000 Reserved as 000. Always write 000 to these bits.
03h R CLI 7:3 CLI Cable Length Indicator. Provides an indication of the length of cable attached to the equalizer input. CLI increases as the cable length increases.
2:0 Reserved 000 Reserved.