SNLS787 September   2025 TDP2004-Q1

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 DC Electrical Characteristics
    6. 5.6 High Speed Electrical Characteristics
    7. 5.7 SMBUS/I2C Timing Charateristics
    8. 5.8 Typical Characteristics
    9. 5.9 Typical Jitter Characteristics
  7. 6Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 RX Equalization Control Settings
      2. 6.3.2 Flat-Gain
      3. 6.3.3 Cross Point
    4. 6.4 Device Functional Modes
      1. 6.4.1 Active Mode
      2. 6.4.2 Standby Mode
    5. 6.5 Programming
      1. 6.5.1 Pin mode
        1. 6.5.1.1 Five-Level Control Inputs
      2. 6.5.2 SMBUS/I2C Register Control Interface
        1. 6.5.2.1 Shared Registers
        2. 6.5.2.2 Channel Registers
      3. 6.5.3 SMBus/I2C Controller Mode Configuration (EEPROM Self Load)
  8. 7Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 DP2.1 Main Link Signal Conditioning
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 USB-C Cross Point Mux with Signal Conditioner
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9Mechanical, Packaging, and Orderable Information

3 Description

The TDP2004-Q1 is a four-channel low-power high-performance linear repeater or redriver designed to support DisplayPort 2.1 up to 20Gbps and AC coupled HDMI2.1 Source up to 12Gbps.

The TDP2004-Q1 receivers deploy continuous time linear equalizers (CTLE) to provide a programmable high-frequency boost. The equalizer can open an input eye that is completely closed due to inter-symbol interference (ISI) induced by an interconnect medium, such as PCB traces or cables. The linear data-paths of TDP2004-Q1 preserve transmit preset signal characteristics. High bandwidth, low channel-to-channel cross-talk, low additive jitter and excellent return loss makes the device almost a passive element in the link, but with useful equalization. The DisplayPort link training is effective through the linear redriver that becomes part of the passive channel in between source Tx and sink Rx. This transparency in the link training protocol results in optimum electrical link and lowest possible latency. The data-path of the device uses an internally regulated power rail that provides high immunity to any supply noise on the board.

The device also has low AC and DC gain variation providing consistent equalization in high volume platform deployment.

Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)
TDP2004-Q1RGF (VQFN, 40)5mm × 7mm
(1) For more information, see Section 9.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
TDP2004-Q1 Typical Application Typical Application