SNLS787 September   2025 TDP2004-Q1

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 DC Electrical Characteristics
    6. 5.6 High Speed Electrical Characteristics
    7. 5.7 SMBUS/I2C Timing Charateristics
    8. 5.8 Typical Characteristics
    9. 5.9 Typical Jitter Characteristics
  7. 6Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 RX Equalization Control Settings
      2. 6.3.2 Flat-Gain
      3. 6.3.3 Cross Point
    4. 6.4 Device Functional Modes
      1. 6.4.1 Active Mode
      2. 6.4.2 Standby Mode
    5. 6.5 Programming
      1. 6.5.1 Pin mode
        1. 6.5.1.1 Five-Level Control Inputs
      2. 6.5.2 SMBUS/I2C Register Control Interface
        1. 6.5.2.1 Shared Registers
        2. 6.5.2.2 Channel Registers
      3. 6.5.3 SMBus/I2C Controller Mode Configuration (EEPROM Self Load)
  8. 7Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 DP2.1 Main Link Signal Conditioning
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 USB-C Cross Point Mux with Signal Conditioner
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9Mechanical, Packaging, and Orderable Information

5.6 High Speed Electrical Characteristics

over operating free-air temperature and voltage range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Receiver
RLRX-DIFF Input differential return loss  50MHz –27 dB
4.0GHz –15 dB
5.0GHz –15 dB
8.0GHz –15 dB
10.0GHz –11 dB
RLRX-CM Input common mode return loss  50MHz –22 dB
4.0GHz –12 dB
5.0GHz –11 dB
8.0GHz –10 dB
10.0GHz –8 dB
XTRX Receiver-side pair-to-pair isolation   Minimum over 10.0MHz to 10.0GHz range –50 dB
Transmitter
RLTX-DIFF Output differential return loss  50.0MHz  –29 dB
4.0GHz –16 dB
5.0GHz –17 dB
8.0GHz –20 dB
10.0GHz –18 dB
RLTX-CM Output common mode return loss  50.0MHz –16 dB
4.0GHz –11 dB
5.0GHz –10 dB
8.0GHz –9 dB
10.0GHz –9 dB
XTTX Transmit-side pair-to-pair isolation    Minimum over 10.0MHz to 10.0GHz range –46 dB
Device Datapath
TPLHD/PHLD Input-to-output latency (propagation delay) through a data channel  For either low-to-high or high-to-low transition 100 ps
TRJ-DATA Additive random jitter with data Jitter through redriver minus the calibration trace. 20Gbps PRBS15. 800mVpp-diff input swing  70 fs
XT Channel to channel xtalk (between adjacent active channels, FEXT Minimum over 50.0MHz to 10.0Ghz range, normalized to EQ gain of 0dB  –38 dB
LINEARITY-DC Output DC linearity 1650 mVpp
LINEARITY-AC Output AC linearity at GAIN = L4  8Gbps 1250 mVpp
LINEARITY-AC Output AC linearity at GAIN = L4  16Gbps 1200 mVpp
LINEARITY-AC Output AC linearity at GAIN = L4  20Gbps 1100 mVpp