SNLU357 April   2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Power Requirements
    2. 2.2 Setup
    3. 2.3 Interfaces
  9. 3Software
    1. 3.1 Software Description
    2. 3.2 Software Installation
    3. 3.3 Programming Options
  10. 4Implementation Results
    1. 4.1 Performance Data and Results
  11. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  12. 6Additional Information
    1. 6.1 Known Hardware or Software Issues
    2. 6.2 Trademarks
    3. 6.3 Terminology
  13. 7Related Documentation
    1. 7.1 Supplemental Content
  14. 8References

1.1 Introduction

The DP83826A offers low and deterministic latency, low power, robust EMC and immunity, and supports 10BASE-Te, 100BASE-TX Ethernet protocols to meet stringent requirements in real-time industrial Ethernet systems. The device includes hardware bootstraps to achieve fast link-up time, fast link-drop detection modes and dedicated reference CLKOUT to clock synchronize other modules on the systems. The device interfaces to the MAC layer through a Media Independent Interface (MII) or a Reduced MII (RMII) both in Master and Slave mode. The DP83826AEVM demonstrates all the features of DP83826A. The EVM supports 10BASE-Te and 100BASE-TX Ethernet protocols. The EVM includes connections to use the DP83826A MII and RMII pins through header pins.