SNOSAR2I September   2008  – June 2026 LMP8601-Q1 , LMP8602-Q1 , LMP8603-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics: Vs = 3.3V
    6. 5.6 Electrical Characteristics: Vs = 5V
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
      1. 6.1.1 Theory of Operation
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Offset Input Pin
      2. 6.3.2 Additional Second-Order Low-Pass Filter
    4. 6.4 Device Functional Modes
      1. 6.4.1 Gain Adjustment
        1. 6.4.1.1 Reducing Gain
        2. 6.4.1.2 Increasing Gain
      2. 6.4.2 Driving Switched Capacitive Loads
  8. 7 Application and Implementation
    1. 7.1 Typical Applications
      1. 7.1.1 High-Side, Current-Sensing Application
        1. 7.1.1.1 Design Requirements
        2. 7.1.1.2 Detailed Design Procedure
        3. 7.1.1.3 Application Curve
      2. 7.1.2 Low-Side, Current-Sensing Application
      3. 7.1.3 Battery Current Monitor Application
      4. 7.1.4 Advanced Battery Charger Application
      5. 7.1.5 Current Loop Receiver Application
      6. 7.1.6 Power Supply Recommendations
      7. 7.1.7 Layout
        1. 7.1.7.1 Layout Guidelines
        2. 7.1.7.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
      2. 8.2.2 Related Links
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

6.4.1 Gain Adjustment

The gain of the LMP860x-Q1 is fixed; however, the overall gain can be adjusted as the signal path between the two internal amplifiers is available on the A1 and A2 pins.