SNOSB24C October   2008  – November 2025 LM5576-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Shutdown / Standby
      2. 6.3.2 Soft Start
      3. 6.3.3 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 High Voltage Start-Up Regulator
      2. 6.4.2 Oscillator and Sync Capability
      3. 6.4.3 Error Amplifier and PWM Comparator
      4. 6.4.4 Ramp Generator
      5. 6.4.5 Maximum Duty Cycle / Input Dropout Voltage
      6. 6.4.6 Boost Pin
      7. 6.4.7 Current Limit
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Bias Power Dissipation Reduction
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1  Custom Design With WEBENCH® Tools
        2. 7.2.2.2  External Components
        3. 7.2.2.3  R3 (RT)
        4. 7.2.2.4  L1
        5. 7.2.2.5  C3 (CRAMP)
        6. 7.2.2.6  C9, C10
        7. 7.2.2.7  D1
        8. 7.2.2.8  C1, C2
        9. 7.2.2.9  C8
        10. 7.2.2.10 C7
        11. 7.2.2.11 C4
        12. 7.2.2.12 R5, R6
        13. 7.2.2.13 R1, R2, C12
        14. 7.2.2.14 R7, C11
        15. 7.2.2.15 R4, C5, C6
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Power Dissipation
      4. 7.4.4 Thermal Considerations
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Custom Design With WEBENCH® Tools
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions

LM5576-Q1 PWP Package 20-Pin HTSSOP (Top View)Figure 4-1 PWP Package 20-Pin HTSSOP (Top View)
Table 4-1 Pin Functions
PINTYPE(1)DESCRIPTIONAPPLICATION INFORMATION
NO.NAME
1VCCOOutput of the bias regulatorVCC monitors VIN up to 9V. Beyond 9V, VCC is regulated to 7V. A 0.1µF to 1µF ceramic decoupling capacitor is required. An external voltage (7.5V – 14V) can be applied to this pin to reduce internal power dissipation.
2SDIShutdown or UVLO inputIf the SD pin voltage is lass than 0.7V, the regulator is in a low power state. If the SD pin voltage is between 0.7V and 1.225V, the regulator is in standby mode. If the SD pin voltage is above 1.225V, the regulator is operational. An external voltage divider can be used to set a line undervoltage shutdown threshold. If the SD pin is left open circuit, a 5µA pullup current source configures the regulator fully operational.
3, 4VINIInput supply voltageNominal operating range: 6V to 75V
5SYNCIOscillator synchronization input or outputThe internal oscillator can be synchronized to an external clock with an external pulldown device. Multiple LM5576-Q1 devices can be synchronized together by connection of the SYNC pins.
6COMPOOutput of the internal error amplifierThe loop compensation network must be connected between this pin and the FB pin.
7FBIFeedback signal from the regulated outputThis pin is connected to the inverting input of the internal error amplifier. The regulation threshold is 1.225V.
8RTIInternal oscillator frequency set inputThe internal oscillator is set with a single resistor, connected between this pin and the AGND pin.
9RAMPORamp control signalAn external capacitor connected between this pin and the AGND pin sets the ramp slope used for current mode control. Recommended capacitor range 50pF to 2000pF.
10AGNDGROUNDAnalog groundInternal reference for the regulator control functions
11SSOSoft-startAn external capacitor and an internal 10µA current source set the time constant for the rise of the error amp reference. The SS pin is held low during standby, VCC UVLO and thermal shutdown.
12OUTOOutput voltage connectionConnect directly to the regulated output voltage.
13, 14PGNDGROUNDPower groundLow-side reference for the PRE switch and the IS sense resistor.
15, 16ISICurrent senseCurrent measurement connection for the re-circulating diode. An internal sense resistor and a sample and hold circuit sense the diode current near the conclusion of the off-time. This current measurement provides the DC level of the emulated current ramp.
17, 18SWOSwitching nodeThe source terminal of the internal buck switch. The SW pin must be connected to the external Schottky diode and to the buck inductor.
19PREIPre-charge assist for the bootstrap capacitorThis open-drain output can be connected to SW pin to aid charging the bootstrap capacitor during very light load conditions or in applications where the output can be pre-charged before the LM5576-Q1 is enabled. An internal pre-charge MOSFET is turned on for 265ns each cycle just prior to the on-time interval of the buck switch.
20BSTIBoost input for bootstrap capacitorAn external capacitor is required between the BST and the SW pins. A 0.022µF ceramic capacitor is recommended. The capacitor is charged from VCC through an internal diode during the off-time of the buck switch.
NAEPGROUNDExposed PadExposed metal pad on the underside of the device. TI recommends to connect this pad to the PWB ground plane to help in heat dissipation.
(1) I = input, O = output