SNVSCS6 March   2026 TPS7H1301-SP

ADVMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Options Table
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Quality Conformance Inspection
    7. 7.7 Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Enable
      2. 9.3.2  Charge Pump
        1. 9.3.2.1 Charge Pump Operation
        2. 9.3.2.2 Foldback Switching
      3. 9.3.3  Startup
      4. 9.3.4  Power Good
      5. 9.3.5  Output Voltage
      6. 9.3.6  Dropout
      7. 9.3.7  Output Voltage Accuracy
      8. 9.3.8  Output Noise
      9. 9.3.9  Power Supply Rejection Ratio
      10. 9.3.10 Stability
        1. 9.3.10.1 Stability of the TPS7H1301
        2. 9.3.10.2 Stability of the TPS7H1302
      11. 9.3.11 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Enable Disable
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Capacitor Selection
          1. 10.2.2.1.1 Input Capacitor (CIN) Selection
          2. 10.2.2.1.2 CFLY
          3. 10.2.2.1.3 CPOUT Capacitor
          4. 10.2.2.1.4 Bypass Capacitors
          5. 10.2.2.1.5 Output Capacitor
        2. 10.2.2.2 Charge Pump Output Resistance
        3. 10.2.2.3 Output Noise
        4. 10.2.2.4 PSRR Design Implications
        5. 10.2.2.5 Stability Design Considerations
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Device Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information
    1.     69

9.3.6 Dropout

For load currents below 150mA both the TPS7H1301 and TPS7H1302 does not enter dropout conditions due the mininmum input voltage (VIN) and drop voltage (VDroop) providing sufficient head room.

The TPS7H1301 and TPS7H1302 integration of a charge pump and LDO, presents unique considerations in regards to LDO dropout. Firstly when VOUT is sufficiently lower than than the magnitude of VIN the output of the charge pump is sufficiently large enough to provide enough input voltage headroom across load current. Typically, an input voltage of 5V with an output voltage of -1.8V or higher satisfies this no dropout condition.

Secondly, when the magnitudes of VIN and VOUT are relatively close, the load current is determinent as to when the LDO enters dropout.

Dropout current, IDO, is defined as the load current when the output voltage falls to 98% of the initial value at the configured output voltage. See Dropout Current Measurement for the test waveforms used to measure dropout.

During dropout conditions, the pass transistor operates in the ohmic (triode) region and functions as a resistive switch. The dropout voltage specification defines the minimum input voltage margin above the nominal programmed output voltage required to maintain output regulation. When the input voltage falls below this minimum threshold (VIN < VOUT + VDO), the output voltage concurrently decreases proportionally, falling out of regulation.