Signals on unused interfaces can typically be left as no connect. Many of the I/Os have a Pad Configuration Register that gives control over the input capabilities of the I/O (INPUTENABLE field in each conf_<module>_<pin> register). For more details, see the Control Module chapter of the AM65x Multicore ARM Keystone III SoC Technical Reference Manual. Software should disable the I/O receive buffers (that is, INPUTENABLE=0) that are not connected in the design as soon as possible during initialization. This INPUTENABLE field defaults to "input active" for most signals, which means there is a potential for some leakage during the power sequencing of the device if the input floats to a mid-supply level before the software can initialize the I/O. This should only be a concern when attempting to power up the design with minimum power consumption. Most designs should be able to tolerate this small amount of leakage in each floating I/O until the software has a chance to disable it. After disabling the receiver of the I/O, no leakage occurs.