SPRACI9A October   2018  – July 2021 AM6526 , AM6528 , AM6546 , AM6548

 

  1.   Trademarks
  2. 1Introduction
  3. 2Recommendations Specific to the AM65x/DRA80x
    1. 2.1  EVM versus Data Sheet
    2. 2.2  Power
    3. 2.3  Reset
    4. 2.4  Boot Modes
    5. 2.5  Unused Signals
    6. 2.6  Clocking
    7. 2.7  System Issues
    8. 2.8  Low Power Considerations
    9. 2.9  DDR
    10. 2.10 MMC
    11. 2.11 OSPI and QSPI
    12. 2.12 GPMC NAND
    13. 2.13 I2C
    14. 2.14 CPSW Ethernet
    15. 2.15 ICSSG
    16. 2.16 USB
    17. 2.17 SERDES - USB3
    18. 2.18 SERDES - PCIe
    19. 2.19 JTAG and EMU
  4. 3References
  5. 4Revision History

2.19 JTAG and EMU

  • Have you included a JTAG connection? If the JTAG and EMU interface is not used, all pins except TRSTn, TCK, and TMS can be left floating. TRSTn must be pulled low to ground through a 4.7k-Ω resistor. TCK should be pulled to VDDSHV0_WKUP and TMS should be pulled to VDDSHV0 through a 4.7k-Ω resistor. However, TI strongly recommends that all board designs contain at least a minimal JTAG port connection to test points or a header footprint to support early prototype debugging. The minimum connections are TCK, RTCK, TMS, TDI, TDO, and TRSTn. JTAG routes and component footprints (except the PD on TRSTn and the PU on TMS and TCK) can be deleted in the production version of the board, if desired.
  • Have you connected the RTCK signal correctly on your JTAG connector? Emulators that support adaptive clocking must be implemented correctly using the RTCK output. If the pin-out of your emulation connector includes the RTCK signal, such as the CTI20 or the MIPI60, the TCK signal should be connected to a buffer for the AM65x and buffer for the RTCK pin. An example can be found in appendix B of the Emulation and Trace Headers Technical Reference Manual.
  • Are all of your JTAG signals using the same I/O voltage? In the AM65x, the buffers for TDI, TDO, and TMS are powered by the VDDSHV0 domain. The buffers for TCK, TRSTz, EMU0, and EMU1 are powered by the VDDSHV0_WKUP domain. For proper operation of most emulators, these signals must be operating at the same voltage level. If this is a requirement for your emulator, ensure that VDDSHV0 and VDDSHV0_WKUP are both at either 1.8 V or 3.3 V.
  • Have you provided the proper buffering for robust JTAG operation? Clock and signal buffering are required whenever the JTAG interface connects to more than one device. Clock buffering is strongly recommended even for single-device implementations. Verify series terminations are provided on each clock buffer output and ideally, that the clock output tracks are skew matched. EMU pins must not be buffered. EMU[1:0] can be bussed to multiple devices.
  • Are you connecting the TRC_x signals for trace operation? If trace operation is needed, the TRC_x signals must be connected to the emulation connector. All TRC_x signals are pinmuxed with other signals. If the trace connections are needed, the connections for GPMC address and PRU2 interface may not be used. Routes for TRC_x signals used for trace must be short and skew matched. Trace signals are on a separate power domain and can be at a different voltage from the other JTAG signals. For more recommendations on TRC/EMU routing, see the Emulation and Trace Headers Technical Reference Manual. A similar summary of this information is available at XDS Target Connection Guide.