SPRADI2 March   2025 AM62L

 

  1.   1
  2.   Trademarks
  3. 1 Introduction
  4. 2 Via Channel Arrays
  5. 3 Width/Spacing Proposal for Escapes
  6. 4 Stackup
  7. 5 Via Sharing
  8. 6 Floorplan Component Placement
  9. 7 Critical Interfaces Impact Placement
  10. 8 Routing Priority
  11. 9 SerDes Interfaces
  12. 10DDR Interfaces
  13. 11Power Decoupling
  14. 12Route Lowest Priority Interfaces Last
  15. 13Summary
  16. 14Revision History

6 Floorplan Component Placement

Careful analysis is required to analyze the locations of the interfaces used on the device and the associated components and connectors. Optimum trace routing will have routes as short as possible with a minimum cross-over. AM62Lx offers interface selection flexibility through pin-mux choices. Pin-muxing enables a same interface function made available on multiple pins and is selectable through a pin mux option. Favorable pin-mux options that ease PCB routing and component placement can be fully used to further optimize the PCB design. The following figure shows the default arrangement of the signal balls and the power and ground balls. Priority is given to component placements without pin-mux options, such as DDR, DSI, USB, OSPI, and so forth.

AM62Lx Floorplan Figure 6-1 AM62Lx Floorplan